| 7471725f618b95d2a61a4bf789dbdc5c7805ffa9 |
|
09-Sep-2014 |
Pramod Gurav <pramod.gurav@smartplayin.com> |
pinctrl: st: remove gpiochip in failure cases
This patch releases gpiochip related resources by calling
gpiochip_remove when gpiochip_irqchip_add fails.
Cc: Maxime Coquelin <maxime.coquelin@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 03e9f0cac5da6af85758276cb4624caf5911f2b9 |
|
03-Sep-2014 |
Linus Walleij <linus.walleij@linaro.org> |
pinctrl: clean up after enable refactoring
commit 2243a87d90b42eb38bc281957df3e57c712b5e56
"pinctrl: avoid duplicated calling enable_pinmux_setting for a pin"
removed the .disable callback from the struct pinmux_ops,
making the .enable() callback the only remaining callback.
However .enable() is a bad name as it seems to imply that a
muxing can also be disabled. Rename the callback to .set_mux()
and also take this opportunity to clean out any remaining
mentions of .disable() from the documentation.
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: Fan Wu <fwu@marvell.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 7a2deccf0ef12f7f6e33150d5875020c0c94fa94 |
|
20-Jun-2014 |
Maxime COQUELIN <maxime.coquelin@st.com> |
pinctrl: st: Fix irqmux handler
st_gpio_irqmux_handler() reads the status register to find out
which banks inside the controller have pending IRQs.
For each banks having pending IRQs, it calls the corresponding handler.
Problem is that current code restricts the number of possible banks inside the
controller to ST_GPIO_PINS_PER_BANK. This define represents the number of pins
inside a bank, so it shouldn't be used here.
On STiH407, PIO_FRONT0 controller has 10 banks, so IRQs pending in the two
last banks (PIO18 & PIO19) aren't handled.
This patch replace ST_GPIO_PINS_PER_BANK by the number of banks inside the
controller.
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: <stable@vger.kernel.org> #v3.15+
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 1f978217a0c687a4cfed6ad698a3173826be4c3f |
|
26-Jun-2014 |
Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> |
pinctrl: pinctrl-st.c: Cleaning up values that are never used
Remove variable that are never used
This was found using a static code analysis program called cppcheck.
Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 8b0c107ce049ddaf0ca9d8cd4faac1cf5c1e9f20 |
|
26-Jun-2014 |
Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> |
pinctrl: pinctrl-st.c: Cleaning up if unsigned is less than zero
Remove checking if a unsigned is less than zero
This was found using a static code analysis program called cppcheck.
Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 8708ebca7464af80accd52c6e1a1cf882593a4ab |
|
25-Jun-2014 |
David PARIS <david.paris@st.com> |
pinctrl: st: add IRQCHIP_SKIP_SET_WAKE flag
no .irq_set_wake API is available for pinctrl-st driver.
Add the IRQCHIP_SKIP_SET_WAKE flag to inform irq handler
not to call this API.
Signed-off-by: David Paris <david.paris@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 2243a87d90b42eb38bc281957df3e57c712b5e56 |
|
09-Jun-2014 |
Fan Wu <fwu@marvell.com> |
pinctrl: avoid duplicated calling enable_pinmux_setting for a pin
What the patch does:
1. Call pinmux_disable_setting ahead of pinmux_enable_setting
each time pinctrl_select_state is called
2. Remove the HW disable operation in pinmux_disable_setting function.
3. Remove the disable ops in struct pinmux_ops
4. Remove all the disable ops users in current code base.
Notes:
1. Great thanks for the suggestion from Linus, Tony Lindgren and
Stephen Warren and Everyone that shared comments on this patch.
2. The patch also includes comment fixes from Stephen Warren.
The reason why we do this:
1. To avoid duplicated calling of the enable_setting operation
without disabling operation inbetween which will let the pin
descriptor desc->mux_usecount increase monotonously.
2. The HW pin disable operation is not useful for any of the
existing platforms.
And this can be used to avoid the HW glitch after using the
item #1 modification.
In the following case, the issue can be reproduced:
1. There is a driver that need to switch pin state dynamically,
e.g. between "sleep" and "default" state
2. The pin setting configuration in a DTS node may be like this:
component a {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&a_grp_setting &c_grp_setting>;
pinctrl-1 = <&b_grp_setting &c_grp_setting>;
}
The "c_grp_setting" config node is totally identical, maybe like
following one:
c_grp_setting: c_grp_setting {
pinctrl-single,pins = <GPIO48 AF6>;
}
3. When switching the pin state in the following official pinctrl
sequence:
pin = pinctrl_get();
state = pinctrl_lookup_state(wanted_state);
pinctrl_select_state(state);
pinctrl_put();
Test Result:
1. The switch is completed as expected, that is: the device's
pin configuration is changed according to the description in the
"wanted_state" group setting
2. The "desc->mux_usecount" of the corresponding pins in "c_group"
is increased without being decreased, because the "desc" is for
each physical pin while the setting is for each setting node
in the DTS.
Thus, if the "c_grp_setting" in pinctrl-0 is not disabled ahead
of enabling "c_grp_setting" in pinctrl-1, the desc->mux_usecount
will keep increasing without any chance to be decreased.
According to the comments in the original code, only the setting,
in old state but not in new state, will be "disabled" (calling
pinmux_disable_setting), which is correct logic but not intact. We
still need consider case that the setting is in both old state
and new state. We can do this in the following two ways:
1. Avoid to "enable"(calling pinmux_enable_setting) the "same pin
setting" repeatedly
2. "Disable"(calling pinmux_disable_setting) the "same pin setting",
actually two setting instances, ahead of enabling them.
Analysis:
1. The solution #2 is better because it can avoid too much
iteration.
2. If we disable all of the settings in the old state and one of
the setting(s) exist in the new state, the pins mux function
change may happen when some SoC vendors defined the
"pinctrl-single,function-off"
in their DTS file.
old_setting => disabled_setting => new_setting.
3. In the pinmux framework, when a pin state is switched, the
setting in the old state should be marked as "disabled".
Conclusion:
1. To Remove the HW disabling operation to above the glitch mentioned
above.
2. Handle the issue mentioned above by disabling all of the settings
in old state and then enable the all of the settings in new state.
Signed-off-by: Fan Wu <fwu@marvell.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 3b02dad20fd5f6159dd5b0b0408f8065d3f48714 |
|
08-Apr-2014 |
Maxime COQUELIN <maxime.coquelin@st.com> |
pinctrl: st: Use ARRAY_SIZE for STiH415 data
This patch completes the one that used ARRAY_SIZE for STiH407 and STiH416
for setting ninput_delays and noutput_delays fields.
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| a4bc1f57fd911424a2b6101e096c43d2b8a82e7f |
|
08-Apr-2014 |
Maxime COQUELIN <maxime.coquelin@st.com> |
pinctrl: st: Use const qualifier when required
This patch adds const qualifier where applicable.
Reported-by: Joe Perches <joe@perches.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 130cbe3082a1d69e7009b8c1dabb44babedd9269 |
|
08-Apr-2014 |
Linus Walleij <linus.walleij@linaro.org> |
pinctrl: st: use gpiolib irqchip helpers
This lets the gpiolib core handle the irqchip set-up and
chained IRQ on the primary (behind the mux) IRQ chip in
the st pinctrl driver.
Default irq type is set to level low at irqchip add time.
The v1 was sent by Linus
(https://lkml.org/lkml/2014/4/4/287).
Two changes were necessary to make it to work properly
on STiH416:
1 - dev reference was not passed to the gpio_chip
struct, causing a panic.
2 - gpiochip_irqchip_add passed IRQ_TYPE_NONE as
default type, which caused lot of warnings at
init time. I choose IRQ_TYPE_LEVEL_LOW as default.
Cc: Srinivas Kandagatla <srinivas.kandagatla@gmail.com>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Maxime COQUELIN <maxime.coquelin@st.com>
|
| c15c0d160c1f64456ed31dc469f0283768cfcf59 |
|
04-Apr-2014 |
Linus Walleij <linus.walleij@linaro.org> |
pinctrl: st: switch IRQ locking to resource callbacks
In the mass-conversion to the new irqchip callbacks, this
in-transit IRQ support was missed. Fix it.
Cc: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Cc: Maxime COQUELIN <maxime.coquelin@st.com>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| bcca9220b211b9668c23c9d8ccb0a3d29716482b |
|
12-Mar-2014 |
Srinivas Kandagatla <srinivas.kandagatla@st.com> |
pinctrl: st: Fix error check for of_irq_to_resource usage
This patch fixes an error check while using of_irq_to_resource.
of_irq_to_resource returns non-zero interrupt number on success and zero
on error. The driver was using error check is wrong way.
Without this patch the driver will configure interrupt zero if there is
no interrupt specified in the node.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 88430acf38da72256cff933aae71de51c3e03acc |
|
12-Mar-2014 |
Maxime COQUELIN <maxime.coquelin@st.com> |
pinctrl: st: Use ARRAY_SIZE instead of raw value for number of delays
This patch replaces the raw values with ARRAY_SIZE for assigning the
ninput_delays and noutput_delays fields of STiH416's st_pctl_data struct.
Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 7ce717db38654b678413e9e31f519feda9b13d18 |
|
12-Mar-2014 |
Giuseppe Cavallaro <peppe.cavallaro@st.com> |
pinctrl: st: add pinctrl support for the STiH407 SoC
This patch adds the initial support for pinctrl based on H407 SoC.
Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 4e6a609fb791ba8f01e624000086217a558a2a10 |
|
12-Mar-2014 |
Giuseppe Cavallaro <peppe.cavallaro@st.com> |
pinctrl: st: Enhance the controller to manage unavailable registers
This patch adds a new logic inside the st pinctrl to manage
an unsupported scenario: some sysconfig are not available!
This is the case of STiH407 where, although documented, the
following registers from SYSCFG_FLASH have been removed from the SoC.
SYSTEM_CONFIG3040
Output Enable pad control for all PIO Alternate Functions
and
SYSTEM_ CONFIG3050
Pull Up pad control for all PIO Alternate Functions
Without managing this condition an imprecise external abort
will be detect.
To do this the patch also reviews the st_parse_syscfgs
and other routines to manipulate the registers only if
actually available.
In any case, for example the st_parse_syscfgs detected
an error condition but no action was made in the
st_pctl_probe_dt.
Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 155795b9d143f4210c19ab50462e19fdeb38bc81 |
|
16-Jan-2014 |
Srinivas Kandagatla <srinivas.kandagatla@st.com> |
pinctrl: st: Add software edge trigger interrupt support
ST pin controller does not have hardware support for detecting edge
triggered interrupts, It only has level triggering support.
This patch attempts to fake up edge triggers from hw level trigger
support in software. With this facility now the gpios can be easily used
for keypads, otherwise it would be difficult for drivers like keypads to
work with level trigger interrupts.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 727b0f71a56de64c0994e24f2504b1b954fd6f93 |
|
16-Jan-2014 |
Srinivas Kandagatla <srinivas.kandagatla@st.com> |
pinctrl: st: Add Interrupt support
This patch add interrupt support to the pincontroller driver.
ST Pincontroller GPIO bank can have one of the two possible types of
interrupt-wirings.
First type is via irqmux, single interrupt is used by multiple gpio
banks. This reduces number of overall interrupts numbers required. All
these banks belong to a single pincontroller.
_________
| |----> [gpio-bank (n) ]
| |----> [gpio-bank (n + 1)]
[irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
| |----> [gpio-bank (... )]
|_________|----> [gpio-bank (n + 7)]
Second type has a dedicated interrupt per gpio bank.
[irqN]----> [gpio-bank (n)]
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| c9dd66b73cc443bfe1fcb5d282034aeb998efd32 |
|
14-Jan-2014 |
Srinivas Kandagatla <srinivas.kandagatla@st.com> |
pinctrl: st: Fix a typo in probe
Probe function had commas instead of semi-colons on some of the lines.
This patch just fixes those lines. No functional chagnes done in this
patch.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 03b054e9696c3cbd3d5905ec96da15acd0a2fe8d |
|
27-Aug-2013 |
Sherman Yin <syin@broadcom.com> |
pinctrl: Pass all configs to driver on pin_config_set()
When setting pin configuration in the pinctrl framework, pin_config_set() or
pin_config_group_set() is called in a loop to set one configuration at a time
for the specified pin or group.
This patch 1) removes the loop and 2) changes the API to pass the whole pin
config array to the driver. It is now up to the driver to loop through the
configs. This allows the driver to potentially combine configs and reduce the
number of writes to pin config registers.
All c files changed have been build-tested to verify the change compiles and
that the corresponding .o is successfully generated.
Signed-off-by: Sherman Yin <syin@broadcom.com>
Reviewed-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| ef75bfd5d106023c04639af92dd0a4d74691ff77 |
|
29-Jul-2013 |
Sachin Kamat <sachin.kamat@linaro.org> |
pinctrl: st: Staticize local symbols
Symbols used only in this file are made static.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 656445f3e24d7dbae284c534004961357c976c93 |
|
29-Jul-2013 |
Sachin Kamat <sachin.kamat@linaro.org> |
pinctrl: st: Convert to use devm_ioremap_resource
devm_request_and_ioremap is deprecated. Use devm_ioremap_resource
instead.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| 539fde59ebc615bcb9af373af8947e866dc072c7 |
|
30-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
pinctrl: st: Remove unnecessary use of of_match_ptr macro
This is a DT only driver and st_pctl_of_match is always compiled
in. Hence of_match_ptr is unnecessary.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
| 5c75acdcae1be608b27414334d7e1febef7dbd99 |
|
28-Jun-2013 |
Wei Yongjun <yongjun_wei@trendmicro.com.cn> |
pinctrl: st: fix return value check
In case of error, the function pinctrl_register() returns
NULL not ERR_PTR(). The IS_ERR() test in the return value
check should be replaced with NULL test.
The function syscon_regmap_lookup_by_phandle() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check
should be replaced with IS_ERR().
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
| 701016c0cba594d5dbd26652ed1e52b0fe2926fd |
|
20-Jun-2013 |
Srinivas KANDAGATLA <srinivas.kandagatla@st.com> |
pinctrl: st: Add pinctrl and pinconf support.
This patch add pinctrl support to ST SoCs.
About hardware:
ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle
pin configurations.
Each multi-function pin is controlled, driven and routed through the PIO
multiplexing block. Each pin supports GPIO functionality (ALT0) and
multiple alternate functions(ALT1 - ALTx) that directly connect the pin
to different hardware blocks. When a pin is in GPIO mode, Output Enable
(OE), Open Drain(OD), and Pull Up (PU) are driven by the related PIO
block. Otherwise the PIO multiplexing block configures these parameters
and retiming the signal.
About driver:
This pinctrl driver manages both PIO and PIO-mux block using pinctrl,
pinconf, pinmux, gpio subsystems. All the pinctrl related config
information can only come from device trees.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
|