/drivers/base/regmap/ |
H A D | regcache-rbtree.c | 31 unsigned int base_reg; member in struct:regcache_rbtree_node 48 *base = rbnode->base_reg; 49 *top = rbnode->base_reg + ((rbnode->blklen - 1) * map->reg_stride); 72 unsigned int base_reg, top_reg; local 76 regcache_rbtree_get_base_top_reg(map, rbnode, &base_reg, 78 if (reg >= base_reg && reg <= top_reg) 85 regcache_rbtree_get_base_top_reg(map, rbnode, &base_reg, 87 if (reg >= base_reg && reg <= top_reg) { 92 } else if (reg < base_reg) { 106 unsigned int base_reg; local 277 regcache_rbtree_insert_to_block(struct regmap *map, struct regcache_rbtree_node *rbnode, unsigned int base_reg, unsigned int top_reg, unsigned int reg, unsigned int value) argument 393 unsigned int base_reg, top_reg; local 453 unsigned int base_reg, top_reg; local 494 unsigned int base_reg, top_reg; local [all...] |
H A D | regmap-debugfs.c | 131 c->base_reg = i; 161 return c->base_reg + (reg_offset * map->reg_stride); 370 c->base_reg, c->max_reg);
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H A D | internal.h | 28 unsigned int base_reg; member in struct:regmap_debugfs_off_cache
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/drivers/watchdog/ |
H A D | rdc321x_wdt.c | 65 int base_reg; member in struct:__anon7287 81 rdc321x_wdt_device.base_reg, &val); 84 rdc321x_wdt_device.base_reg, val); 113 rdc321x_wdt_device.base_reg, RDC_CLS_TMR); 117 rdc321x_wdt_device.base_reg, 173 rdc321x_wdt_device.base_reg, &value); 246 rdc321x_wdt_device.base_reg = r->start; 258 rdc321x_wdt_device.base_reg, RDC_WDT_RST);
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/drivers/media/dvb-frontends/ |
H A D | dibx000_common.c | 75 while (((status = dibx000_read_word(mst, mst->base_reg + 2)) & 0x0100) == 0 && --i > 0) 98 dibx000_read_word(mst, mst->base_reg + 2); 105 dibx000_write_word(mst, mst->base_reg, data); 122 dibx000_write_word(mst, mst->base_reg+1, da); 154 dibx000_write_word(mst, mst->base_reg+1, da); 162 da = dibx000_read_word(mst, mst->base_reg); 181 return dibx000_write_word(mst, mst->base_reg + 3, (u16)(60000 / speed)); 197 return dibx000_write_word(mst, mst->base_reg + 4, intf); 270 tx[0] = (((mst->base_reg + 1) >> 8) & 0xff); 271 tx[1] = ((mst->base_reg [all...] |
H A D | dibx000_common.h | 30 u16 base_reg; member in struct:dibx000_i2c_master
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H A D | cx24117.c | 772 u8 base_reg = (state->demod == 0) ? local 776 ret = cx24117_readregN(state, base_reg, buf, 4);
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/drivers/clk/tegra/ |
H A D | clk-tegra124.c | 202 .base_reg = PLLX_BASE, 236 .base_reg = PLLC_BASE, 290 .base_reg = PLLC2_BASE, 312 .base_reg = PLLC3_BASE, 371 .base_reg = PLLC4_BASE, 420 .base_reg = PLLM_BASE, 459 .base_reg = PLLE_BASE, 497 .base_reg = PLLRE_BASE, 533 .base_reg = PLLP_BASE, 562 .base_reg [all...] |
H A D | clk-tegra114.c | 222 .base_reg = PLLC_BASE, 273 .base_reg = PLLC2_BASE, 295 .base_reg = PLLC3_BASE, 344 .base_reg = PLLM_BASE, 383 .base_reg = PLLP_BASE, 413 .base_reg = PLLA_BASE, 451 .base_reg = PLLD_BASE, 469 .base_reg = PLLD2_BASE, 511 .base_reg = PLLU_BASE, 541 .base_reg [all...] |
H A D | clk-tegra20.c | 298 .base_reg = PLLC_BASE, 314 .base_reg = PLLM_BASE, 330 .base_reg = PLLP_BASE, 347 .base_reg = PLLA_BASE, 363 .base_reg = PLLD_BASE, 385 .base_reg = PLLU_BASE, 402 .base_reg = PLLX_BASE, 418 .base_reg = PLLE_BASE,
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H A D | clk-tegra30.c | 419 .base_reg = PLLC_BASE, 447 .base_reg = PLLM_BASE, 467 .base_reg = PLLP_BASE, 484 .base_reg = PLLA_BASE, 500 .base_reg = PLLD_BASE, 518 .base_reg = PLLD2_BASE, 535 .base_reg = PLLU_BASE, 552 .base_reg = PLLX_BASE, 569 .base_reg = PLLE_BASE,
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H A D | clk-pll.c | 187 #define pll_readl_base(p) pll_readl(p->params->base_reg, p) 192 #define pll_writel_base(val, p) pll_writel(val, p->params->base_reg, p) 253 lock_addr += pll->params->base_reg; 1583 val = readl_relaxed(clk_base + pll_params->base_reg);
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H A D | clk.h | 166 * @base_reg: PLL base reg offset 181 u32 base_reg; member in struct:tegra_clk_pll_params
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/drivers/gpu/drm/tilcdc/ |
H A D | tilcdc_crtc.c | 55 static const uint32_t base_reg[] = { local 71 tilcdc_write(dev, base_reg[n], tilcdc_crtc->start);
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/drivers/net/ethernet/broadcom/bnx2x/ |
H A D | bnx2x_init_ops.h | 873 u32 base_reg, u32 reg) 878 REG_WR(bp, base_reg + i*4, 872 bnx2x_qm_set_ptr_table(struct bnx2x *bp, int qm_cid_count, u32 base_reg, u32 reg) argument
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