ZX Spectrum Next
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Developer | Spec Next Ltd. |
---|---|
Manufacturer | SMS Electronics |
Type | home computer, |
Release date | February 2020 |
Introductory price |
|
Units sold | 3000+ |
Operating system | Next ZXOS |
CPU | FPGA |
Memory | 1 MB (upgradeable to 2 MB) |
Display | VGA, RGB, HDMI |
Graphics | Sinclair, Timex, ULA+ |
Sound | beeper, 3x AY-3-8912 |
Controller input | Classic Joystick |
Connectivity | |
Predecessor | ZX Spectrum 128 |
Sinclair ZX Spectrum Next is a home computer produced by Spec Next Ltd[1].
While its physical design is intended to pay homage to the ZX Spectrum 128, the ZX Spectrum Next can play both classic and enhanced games.
History
The ZX Spectrum Next started life in 2010 as a clone of the Brazilian TK95 Spectrum clone, using an Altera DE1 FPGA, and was first announced as a product in 2016 after the participation of original Spectrum industrial designer Rick Dickinson was secured. The FPGA was later changed to a Xilinx Spartan 6 chip.[2] The crowdfunding campaign was launched on the Kickstarter platform in January 2017 with an initial funding goal of £250,000. The campaign finally closed in May having raised £723,390 funds.[3]
After the successful campaign, the design was changed to add twin joystick ports[4] and a larger FPGA. The sprite functionality was moved from the Pi accelerator to a hardware circuit in the FPGA, and the accelerator was repurposed as a general-purpose co-processor, originally running a bare metal ARM program, but later running an custom NextPi[5] operating system based on DietPi linux.
Announcements
Hardware[6]
FPGA configured to be a Z80N CPU running at 28MHz, 1-2Mb RAM, SD card interface as primary storage, 3 AY sound chips, COVOX and an optional Raspberry PI 0 used to emulate tape loading but able to be programmed from the next remotely.
Beautiful case design[7] by the late Rick Dickinson who designed the original 48K spectrum.
Specifications
CPU
Z80N (z80 compatible with some additional instructions) operable at software selectable speeds of 3.5 MHz, 7 MHz, 14 MHz or 28 MHz with wait states.
Copper
A co-processor running independently of the cpu executes simple instructions that can modify the nextreg state. For example, it can change palettes, alter the display mode or play stereo music. The copper is synchronized with the display generation so it is able to make these changes at precise locations in the display.
DMA
The ZXN DMA, compatible with a subset of the Z80 DMA chip, is able to perform transfers between memory and/or io using short two cycle reads and writes. In burst mode, the zxn dma can send bytes at programmable rates allowing it to play sampled music while returning control to the cpu between transfers. At this time the zxn dma and the cpu share the bus and the dma operates at the currently set cpu speed.
RAM Memory
768K of RAM in the unexpanded machine or 1792K of RAM in the expanded machine. This memory is available in 16K banks as in the original 128K Spectrums and can be mapped as usual using the standard ports 0x7ffd and 0x1ffd. An additional port 0xdffd adds bits to port 0x7ffd to reach all memory banks. The native bankswitching scheme in the zx next is called MMU. This scheme divides the same memory into 8K pages and allows any page to be mapped into any 8K slot of the Z80's 64K address space.
ROM
64K of ROM is reserved for ROMs 0-3 as in the Spectrum +3. Also available is 32K of Alt ROM that can replace the normal ROMs; this ROM is user programmable.
Graphics
The display is composed of layers with programmable priority. Layers are listed below.
ULA
Compatible timing, contention and floating bus behaviour with the 48k, 128k, +3 and Pentagon. Supports hardware pixel scrolling in the X and Y directions and these resolutions:
- 256x192 pixel 32x24 attributes in bank 5 (48k / 128k)
- 256x192 pixel 32x24 attributes in bank 7 (128k second display)
- 256x192 pixel 32x24 attributes at 0x6000 in bank 5 (timex second display)
- 256x192 pixel 32x192 attributes at 0x4000 and 0x6000 in bank 5 (timex hi-colour)
- 512x192 pixel monochrome at 0x4000 and 0x6000 in bank 5 (timex hi-res)
LoRes
Occupies the same layer as the ULA with LoRes replacing the ULA where it is enabled. Supports hardware pixel scrolling in the X and Y directions. Two resolutions are available:
- 128x96 4-bit colour per pixel at either 0x4000 or 0x6000 in bank 5 (Radastan mode originating on the ZX UNO)
- 128x96 8-bit colour per pixel occupying 0x4000 and 0x6000 in bank 5
Layer 2
A pixel mapped display without colour clash. Supports hardware pixel scrolling in the X and Y directions. Can be mapped to any location in memory starting at a 16K boundary. Available resolutions are:
- 256x192 8-bit colour per pixel
- 320x256 8-bit colour per pixel
- 640x256 4-bit colour per pixel
Sprites
Up to 128 hardware sprites of size 16x16 pixels with either 8-bits or 4-bits of colour per pixel. A minimum of 100 sprites per line can be display at this size. Sprites can be scaled 1x 2x 4x 8x, rotated, mirrored and linked together.
Tilemap
A hardware character display coming in two resolutions (80x32 = 640x256 pixels, 40x32 = 320x256). Supports hardware pixel scrolling in the X and Y directions. The character map and glyphs are stored at programmable locations in bank 5. Individual characters can be independently rotated and mirrored. Each glyph is 8x8 pixels in size with 4-bits of colour per pixel. Another mode eliminates rotation and mirroring in favour of 8x8 pixel glyphs defined as monochrome UDGs but with more colour information stored in the character map.
Some layer priority modes allow layer 2 to be highlighted or darkened by the ULA. Another setting allows the tilemap and ULA to stencil each other.
Sound
Stereo sound is played through HDMI, 3.5mm audio jack or optional internal speaker. Sound sources:
Beeper
Beeps and tape sound.
3 x AY 8910 PSGs
Arranged to be compatible with the dual arrangement turbosound. AY instances can be programmed as mono or either ABC or ACB stereo mode.
4 x 8-bit DACs
Two DACs are assigned to the left channel and two are assigned to the right channel. Common 8-bit dac peripherals in the Spectrum community such as Specdrum and Soundrive are mapped to these dacs.
Raspberry PI I2S
Audio generated by an optional Pi accelerator can be mixed into the internal next audio stream or can be mapped to ear for tape loading.
Software
The Next can boot into different software profiles. The primary Next profile runs the NextZXOS operating system, which is an evolution of the +3e OS [8], itself an enhancement of the ZX Spectrum +3 firmware. Other software profiles configure the Next into different historical Spectrum models, each one preserving original ROM and timing compatibly. Many of these other profiles can run esxDOS[9] on its virtual divMMC SD-based hardware.
Alternate Cores
The Next can be configured to boot into up to thirty alternate cores resident in flash memory, giving it the ability to simulate other 8-bit microcomputers such as the Acorn BBC Micro[10].
Reception
THe Next was showcased by MagPi magazine in December 2019[11], and the Accelerated model was reviewed[12] in May 2020, being given a verdict of "9/10: The ZX Spectrum Next is a lovely piece of kit. Well-designed and well-built: authentic to the original, and with technology that nods to the past while remaining functional and relevant in the modern age."
References
- ^ https://www.specnext.com
- ^ https://specnext.dev/blog/2019/01/21/the-early-years/
- ^ https://specnext.dev/blog/2019/01/31/the-kickstarter/
- ^ https://specnext.dev/blog/2019/02/22/kickstarter-washup/
- ^ https://zx.xalior.com/NextPi/
- ^ https://gitlab.com/SpectrumNext/ZX_Spectrum_Next_FPGA/-/tree/master/cores/zxnext
- ^ https://www.flickr.com/photos/9574086@N02/albums/72157685519763101
- ^ https://worldofspectrum.org/zxplus3e/index.html
- ^ http://www.esxdos.org/index.html
- ^ https://github.com/hoglet67/BeebFpga/wiki/Spectrum-Next
- ^ https://magpi.raspberrypi.org/articles/zx-spectrum-next-raspberry-pi-project-showcase
- ^ https://magpi.raspberrypi.org/articles/zx-spectrum-next-accelerated-review
External links