CMOS_ASIC_Design Lab

This Lab Deals with Digital Physical Design

Each Lab is taught with some basic topics of Digital Physical Design and we are asked to complete the assignments given in the lab

Name		Name	Last commit message	Last commit date
Latest commit History 29 Commits
Lab - 1 : Standard Cell Libraries		Lab - 1 : Standard Cell Libraries
Lab - 2 : Clock Gating		Lab - 2 : Clock Gating
Lab - 3 : Synthesis		Lab - 3 : Synthesis
Lab - 4 : Synthesis Continued		Lab - 4 : Synthesis Continued
Lab - 5 : Regular Expressions and Command-Line Perl		Lab - 5 : Regular Expressions and Command-Line Perl
Lab - 6 : Scan Chains		Lab - 6 : Scan Chains
Lab - 7 : Static Timing Analysis		Lab - 7 : Static Timing Analysis
README.md		README.md