MLIR For Beginners tutorial

Gallery Theme for Hugo

Crawl a site to generate knowledge files to create your own custom GPT from a URL

New MaixCDK will replace this repo: https://github.com/sipeed/MaixCDK

RISC-V Instruction Set Manual

An MLIR-based compiler framework bridges DSLs (domain-specific languages) to DSAs (domain-specific architectures).

Inference Llama 2 in one file of pure C

RISC-V support for LLVM projects (LLVM, Clang, ...)

Another World on a chip

AI companions with memory: a lightweight stack to create and host your own AI companions

Open-source RAG Framework for building GenAI Second Brains 🧠 Build productivity assistant (RAG) ⚡️🤖 Chat with your docs (PDF, CSV, ...) & apps using Langchain, GPT 3.5 / 4 turbo, Private, Anthropic…

Opensource software/hardware platform to build edge AI solutions deployed on FPGA or custom ASIC hardware.

Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM). . . . . . Online tutorial: https://google.githu…

[AAAI 2021] PyTorch implementation for "A Graph-based Relevance Matching Model for Ad-hoc Retrieval"

[EMNLP 2022] This is the code repo for our EMNLP‘22 paper "Dimension Reduction for Efficient Dense Retrieval via Conditional Autoencoder".

OpenLLaMA, a permissively licensed open source reproduction of Meta AI’s LLaMA 7B trained on the RedPajama dataset

Specify what you want it to build, the AI asks for clarification, and then builds it.

The simplest, fastest repository for training/finetuning medium-sized GPTs.

A minimal PyTorch re-implementation of the OpenAI GPT (Generative Pretrained Transformer) training

Sheaves library for graph abstractions based on NetworkX

simulator for riscv instruction set

The C++ Core Guidelines are a set of tried-and-true guidelines, rules, and best practices about coding in C++

You like pytorch? You like micrograd? You love tinygrad! ❤️

Inference code for LLaMA models

Get ready to meet Fauno - the Italian language model crafted by the RSTLess Research Group from the Sapienza University of Rome.

Learning FPGA, yosys, nextpnr, and RISC-V