biolek LTSpice

knowm · Jan 23, 2017 · cf3c1ae · cf3c1ae
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diff --git a/Biolek_Linear_Resistance_Switch/LTSpice/Biolek_IV.png b/Biolek_Linear_Resistance_Switch/LTSpice/Biolek_IV.png
diff --git a/Biolek_Linear_Resistance_Switch/LTSpice/Biolek_Time.png b/Biolek_Linear_Resistance_Switch/LTSpice/Biolek_Time.png
diff --git a/Biolek_Linear_Resistance_Switch/LTSpice/Circuit_Biolek.png b/Biolek_Linear_Resistance_Switch/LTSpice/Circuit_Biolek.png
diff --git a/Biolek_Linear_Resistance_Switch/LTSpice/README.md b/Biolek_Linear_Resistance_Switch/LTSpice/README.md
@@ -0,0 +1,16 @@
+## About 
+
+| Model Class | Model Language | Simulator |
+|---|---|---|
+|SPICE Subcircuit|SPICE|LTSpice|
+
+Other names: "The Ideal Memristor", "The Resistance Switch"
+
+## Sources
+
+1. Original Source of SPICE Model: <https://cyakopcic1.files.wordpress.com/2014/02/memristor-spice-modeling.pdf>
+
+## How to Run Model
+
+1. LTSpice Intro - [The Joglekar Resistance Switch Memristor Model in LTSpice](http://knowm.org/the-joglekar-resistance-switch-memristor-model-in-ltspice/)
+1. LTSpice - [Memristor Models in LTSpice](http://knowm.org/memristor-models-in-ltspice/)
diff --git a/Biolek_Linear_Resistance_Switch/LTSpice/memristor_biolek.sub b/Biolek_Linear_Resistance_Switch/LTSpice/memristor_biolek.sub
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+* HP Memristor SPICE Model Using Biolek Window
+
+* Connections:
+* TE:  Top electrode
+* BE:  Bottom electrode
+* XSV: External connection to plot state variable
+*      that is not used otherwise
+
+.SUBCKT MEM_BIOLEK TE BE XSV 
+
+* Ron:  Minimum device resistance
+* Roff: Maximum device resistance
+* D:    Width of the thin film
+* uv:   Dopant mobility
+* p:    Parameter for window function
+* x0:   State varaible initial value
+
+.params Ron=100 Roff=1K x0=.076 D=16N uv=40F p=7
+
+* Biolek Window Function
+.func f(V1,I1)={1-pow((V1-stp(-I1)),(2*p))}
+
+* Memristor I-V Relationship
+.func IVRel(V1,V2) = V1/(Ron*V2 + Roff*(1-V2))
+
+* Circuit to determine state variable
+Gx 0 XSV value={I(Gmem)*Ron*uv*f(V(XSV,0),I(Gmem))/pow(D,2)}
+Cx XSV 0 {1}
+.ic V(XSV) = x0
+
+* Current source representing memristor
+Gmem TE BE value={IVRel(V(TE,BE),V(XSV,0))}
+
+.ENDS MEM_BIOLEK
diff --git a/Biolek_Linear_Resistance_Switch/LTSpice/memristor_biolek_sim_IV.plt b/Biolek_Linear_Resistance_Switch/LTSpice/memristor_biolek_sim_IV.plt
@@ -0,0 +1,27 @@
+[Transient Analysis]
+{
+   Npanes: 2
+   Active Pane: 1
+   {
+      traces: 1 {336592898,0,"Ix(U1:TE)"}
+      Parametric: "V(n001)"
+      X: (' ',2,-1.2,0.02,1.2)
+      Y[0]: ('m',1,-0.001,0.0002,0.0012)
+      Y[1]: ('_',0,1e+308,0,-1e+308)
+      Amps: ('m',0,0,1,-0.001,0.0002,0.0012)
+      Log: 0 0 0
+      NeyeDiagPeriods: 0
+      TeyeEnd: 3
+   },
+   {
+      traces: 1 {268959747,0,"V(nc_01)"}
+      Parametric: "V(n001)"
+      X: (' ',2,-1.2,0.02,1.2)
+      Y[0]: (' ',2,0.21,0.07,1.05)
+      Y[1]: ('_',0,1e+308,0,-1e+308)
+      Volts: (' ',0,0,2,0.21,0.07,1.05)
+      Log: 0 0 0
+      NeyeDiagPeriods: 0
+      TeyeEnd: 3
+   }
+}
diff --git a/Biolek_Linear_Resistance_Switch/LTSpice/memristor_biolek_sim_T.plt b/Biolek_Linear_Resistance_Switch/LTSpice/memristor_biolek_sim_T.plt
@@ -0,0 +1,26 @@
+[Transient Analysis]
+{
+   Npanes: 2
+   Active Pane: 1
+   {
+      traces: 2 {268959747,0,"V(n001)"} {336592898,1,"Ix(U1:TE)"}
+      X: ('m',0,0,0.02,0.2)
+      Y[0]: (' ',1,-1,0.2,1)
+      Y[1]: ('µ',0,-0.00042,7e-05,0.00042)
+      Volts: (' ',0,0,1,-1,0.2,1)
+      Amps: ('µ',0,0,0,-0.00042,7e-05,0.00042)
+      Log: 0 0 0
+      NeyeDiagPeriods: 0
+      TeyeEnd: 3
+   },
+   {
+      traces: 1 {268959748,0,"V(nc_01)"}
+      X: ('m',0,0,0.02,0.2)
+      Y[0]: ('m',0,0.52,0.04,0.96)
+      Y[1]: ('µ',0,1e+308,7e-05,-1e+308)
+      Volts: ('m',0,0,0,0.52,0.04,0.96)
+      Log: 0 0 0
+      NeyeDiagPeriods: 0
+      TeyeEnd: 3
+   }
+}
diff --git a/Biolek_Linear_Resistance_Switch/LTSpice/memristor_with_state.asy b/Biolek_Linear_Resistance_Switch/LTSpice/memristor_with_state.asy
@@ -0,0 +1,19 @@
+Version 4
+SymbolType CELL
+LINE Normal 4 33 -4 33
+LINE Normal 0 -48 0 -32
+LINE Normal 0 48 0 33
+LINE Normal 32 0 0 0
+CIRCLE Normal 4 33 -4 0
+CIRCLE Normal 4 -32 -4 0
+SYMATTR Prefix X
+SYMATTR Description Parameterized Memristor
+PIN 0 -48 RIGHT 8
+PINATTR PinName TE
+PINATTR SpiceOrder 1
+PIN 0 48 RIGHT 8
+PINATTR PinName BE
+PINATTR SpiceOrder 2
+PIN 32 0 LEFT 8
+PINATTR PinName xsv
+PINATTR SpiceOrder 3