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knowm · Dec 15, 2016 · 340a62b · 340a62b
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diff --git a/.gitignore b/.gitignore
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+*.*prn
+*.*la
+*.*log
+*.*vams
+*.*.va.adms
+**.xml
+.libs/
+*.my
+
diff --git a/Joglekar_Linear_Resistance_Switch/Ltspice/README.md b/Joglekar_Linear_Resistance_Switch/Ltspice/README.md
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+## About 
+
+| Model Class | Model Language | Simulator |
+|---|---|---|
+|SPICE Subcircuit|SPICE|LTSpice|
+
+Other names: "The Ideal Memristor", "The nonlinear Dopant Drift", "The Resistance Switch" or "The HP Model"
+
+## Sources
+
+1. Original Source of SPICE Model: <http://www.radioeng.cz/fulltexts/2009/09_02_210_214.pdf>
+
+## How to Run Model
+
+1. LTSpice - [The Joglekar Resistance Switch Memristor Model in LTSpice](http://knowm.org/the-joglekar-resistance-switch-memristor-model-in-ltspice/)
diff --git a/Joglekar_Linear_Resistance_Switch/Ltspice/memristor.asy b/Joglekar_Linear_Resistance_Switch/Ltspice/memristor.asy
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+Version 4
+SymbolType BLOCK
+LINE Normal 4 33 -4 33
+LINE Normal 0 -48 0 -32
+LINE Normal 0 48 0 33
+CIRCLE Normal 4 33 -4 0
+CIRCLE Normal 4 -32 -4 0
+SYMATTR SpiceModel memristor
+SYMATTR Prefix X
+SYMATTR Description Parameterized Memristor
+SYMATTR ModelFile memristor.sub
+PIN 0 -48 RIGHT 8
+PINATTR PinName A
+PINATTR SpiceOrder 1
+PIN 0 48 RIGHT 8
+PINATTR PinName B
+PINATTR SpiceOrder 2
diff --git a/Joglekar_Linear_Resistance_Switch/Ltspice/memristor.sub b/Joglekar_Linear_Resistance_Switch/Ltspice/memristor.sub
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+***********************************************
+* HP Memristor SPICE Model
+* For Transient Analysis only
+* created by Zdenek and Dalibor Biolek
+***********************************************
+* Ron, Roff - Resistance in ON / OFF States
+*
+* Rinit - Resistance at T=0
+*
+* D - Width of the thin film
+*
+* uv - Migration coefficient
+*
+* p - Parameter of the WINDOW-function for
+*     modeling nonlinear boundary conditions
+*
+* x - W/D Ratio, W is the actual width
+*     of the doped area (from 0 to D)
+*
+***********************************************
+.SUBCKT memristor plus minus PARAMS:
++ Ron=100 Roff=16K Rinit=11K D=10N uv=10F p=1
+
+***********************************************
+* DIFFERENTIAL EQUATION MODELING *
+***********************************************
+Gx 0 x value={I(Emem)*uv*Ron/D**2*f(V(x),p)}
+Cx x 0 1 IC={(Roff-Rinit)/(Roff-Ron)}
+Raux x 0 1000000
+
+***********************************************
+* RESISTIVE PORT OF THE MEMRISTOR *
+***********************************************
+Emem plus aux value={-I(Emem)*V(x)*(Roff-Ron)}
+Roff aux minus {Roff}
+
+***********************************************
+* FLUX COMPUTATION *
+***********************************************
+Eflux flux 0 value={SDT(V(plus,minus))}
+
+***********************************************
+* CHARGE COMPUTATION *
+***********************************************
+Echarge charge 0 value={SDT(I(Emem))}
+
+***********************************************
+* WINDOW FUNCTIONS
+* FOR NONLINEAR DRIFT MODELING *
+***********************************************
+* window function, according to Joglekar
+.func f(x,p)={1-(2*x-1)**(2*p)}
+
+.ENDS memristor
diff --git a/Joglekar_Linear_Resistance_Switch/Ltspice/memristor_sim.asc b/Joglekar_Linear_Resistance_Switch/Ltspice/memristor_sim.asc
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+Version 4
+SHEET 1 880 680
+WIRE 416 0 16 0
+WIRE 416 16 416 0
+WIRE 16 32 16 0
+WIRE 16 144 16 112
+WIRE 224 144 16 144
+WIRE 416 144 416 112
+WIRE 416 144 224 144
+WIRE 224 192 224 144
+FLAG 224 192 0
+SYMBOL memristor 416 64 R0
+SYMATTR InstName Memristor
+SYMBOL voltage 16 16 R0
+WINDOW 123 0 0 Left 2
+WINDOW 39 0 0 Left 2
+SYMATTR InstName V1
+SYMATTR Value SINE(0 1.2 1 0 0 0)
+TEXT 96 -32 Left 2 !.tran 0 3s 0 3m
diff --git a/Joglekar_Linear_Resistance_Switch/Verilog-A/README.md b/Joglekar_Linear_Resistance_Switch/Verilog-A/README.md
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+## About 
+
+| Model Class | Model Language | Simulator |
+|---|---|---|
+|Ill-formed|Verilog-A|Xyce|
+
+## Instructions
+
+    cd .../memristor-models-4-all/Joglekar_Linear_Resistance_Switch/Verilog-A
+    buildxyceplugin -o memristor *.va /usr/local/lib
+    Xyce -plugin /usr/local/lib/memristor.so memristor_sim.cir
+    gnuplot
+    plot '.../memristor-models-4-all/Joglekar_Linear_Resistance_Switch/Verilog-A/memristor_sim.cir.prn' using 3:4 with lines title "I-V"
diff --git a/Joglekar_Linear_Resistance_Switch/Verilog-A/memristor.va b/Joglekar_Linear_Resistance_Switch/Verilog-A/memristor.va
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+`include "disciplines.vams"
+`include "constants.vams"
+
+`define X_BORDER_BUMP 10e-18
+
+`define attr(txt) (*txt*)
+
+module memristor1 (p,n);
+
+    inout p,n;
+    electrical p,n;
+
+    parameter real Roff=16000 from (0:inf) `attr(info="Roff" type="instance");
+    parameter real Ron=100 from (0:inf) `attr(info="Ron" type="instance");
+    parameter real Rinit=11000 from (0:inf) `attr(info="Rinit" type="instance");
+    parameter real D=10n from (0:inf) `attr(info="D" type="instance");
+    parameter real uv=10e-15 from (0:inf) `attr(info="uv" type="instance");
+    parameter real p_coeff=1.0 from (0:inf) `attr(info="p_coeff" type="instance");
+
+    // local variables that should persist over time steps
+    real w_last;
+    real time_last;
+
+    // local variables that hold temporary values
+    real G;
+    real window_function;
+    real w;
+    real dw;
+    real R;
+    real direction;
+    real current;
+    real time;
+    real time_delta;
+
+
+   analog
+     begin
+
+        @(initial_instance)
+        begin
+          w_last = ((Roff - Rinit) / (Roff - Ron)) * D;
+          time_last = 0;
+        end      
+
+        // calculate conductance
+        G = 1 / (Ron * w_last / D + Roff * (1 - w_last / D));
+        current = G * V(p,n);
+
+
+        direction = 0;
+        if (current > 0) begin
+          if(w_last<=0) begin
+              direction=1;
+          end
+        end
+        else begin
+          if(w_last>=D) begin
+                direction=-1;
+          end
+        end
+
+        time = $realtime;
+        time_delta = time - time_last;
+        window_function = (1.0 - (pow(2 * w_last / D - 1, 2 * p_coeff)));
+        dw = uv * Ron / D * current * window_function * time_delta;
+        w = w_last + dw + direction * `X_BORDER_BUMP;
+
+        if(w >= D) begin
+          w = D;
+        end
+        if(w <= 0) begin
+          w = 0;
+        end
+
+        // calculate conductance
+        G = 1 / (Ron * w / D + Roff * (1 - w / D));
+
+        // set the current
+        I(p,n) <+ -1.0*G*V(p,n);
+
+        // persist variables
+        w_last = w;
+        time_last = time;
+
+     end
+endmodule
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diff --git a/Joglekar_Linear_Resistance_Switch/Verilog-A/memristor_sim.cir b/Joglekar_Linear_Resistance_Switch/Verilog-A/memristor_sim.cir
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+
+* Voltage Sources
+V1 1 0 SIN(0V 1.2V 1Hz)
+
+* Memristors
+YMEMRISTOR1 M1 1 0 
+
+* Analysis Command
+.TRAN 1ms 1s
+* Output
+.PRINT TRAN V(1) I(V1) 
+
+.END
diff --git a/Joglekar_Linear_Resistance_Switch/Verilog-A/memristor_sim.png b/Joglekar_Linear_Resistance_Switch/Verilog-A/memristor_sim.png
diff --git a/Metastable_Switch/Verilog-A/README.md b/Metastable_Switch/Verilog-A/README.md
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+## About 
+
+| Model Class | Model Language | Simulator |
+|---|---|---|
+|Ill-formed|Verilog-A|Xyce|
+
+## Instructions
+
+    cd ~/workspaces/workspace_knowm/memristor-models-4-all/Metastable_Switch/Verilog-A
+    buildxyceplugin -o metastableswitch *.va /usr/local/lib
+    Xyce -plugin /usr/local/lib/metastableswitch.so memristor_sim.cir
+    gnuplot
+    plot '~/workspaces/workspace_knowm/memristor-models-4-all/Metastable_Switch/Verilog-A/memristor_sim.cir.prn' using 3:4 with lines title "I-V"
+
+## Note
+
+This is a work in progress until Xyce/ADMS has implemented the `distNormal` function.