FPGA Sort is a sorting library for FPGA implementation. This has a hardware engine in RTL to perform the sorting process and call it a library from the OpenCL kernel code. The engine is built by combining the following three hardware sorting algorithms: the sorting network, high-bandwidth merge sorter tree, and virtual merge sorter tree.

This product is licensed under the Apache License, Version 2.0.

TBD

Grants-in-Aid for Scientific Research-KAKENHI- "Early-Career Scientists" by Japan Society for the Promotion of Science.

URL: https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-19K20276/

• Ryohei Kobayashi et al., A Sorting Library for FPGA Implementation in OpenCL Programming, HEART '21