CN109115245B

CN109115245B - Multi-channel transducer apparatus and method of operating the same

Info

Publication number: CN109115245B
Application number: CN201810718381.5A
Authority: CN
Inventors: A·L·维塔利
Original assignee: STMicroelectronics SRL
Current assignee: STMicroelectronics International NV
Priority date: 2014-03-28
Filing date: 2015-03-27
Publication date: 2021-10-01
Anticipated expiration: 2035-03-27
Also published as: CN109115245A; CN104954020A; CN104954020B

Abstract

The present disclosure relates to a multi-channel transducer device and a method of operating the same. One example apparatus includes at least two acquisition modules having different sensitivities and a signal processing stage that generates a mixed signal representing a lower gain signal mapped onto a higher gain signal. One example method of operation includes receiving a first signal from a first sensor having a first sensitivity, receiving a second signal from a second sensor having a second sensitivity different from the first sensitivity, generating a mixed signal by mapping the second signal to the first signal, outputting the first signal when the first signal is below a first threshold and above a second threshold, and outputting the mixed signal when the first signal is above the first threshold and when the first signal is below the second threshold.

Description

Multi-channel transducer apparatus and method of operating the same

The present application is a divisional application of the chinese patent application having an application date of 2015, 3 and 27, and a national application number of 201510142661.2, entitled "multichannel transducer apparatus and method of operating the same".

Technical Field

The present disclosure relates to a multi-channel transducer device, and more particularly, to a multi-channel transducer device that maps a low-gain signal onto a high-gain signal when the high-gain signal is saturated to form a mixed signal and smoothly transitions into the mixed signal, and an operating method thereof.

Background

Devices are becoming more sensitive and more accurate with respect to detecting or sensing their surroundings. To detect signals of high dynamic range, these devices comprise a plurality of acquisition channels with different sensitivities (e.g. a plurality of sensors with different sensitivities). The range of a single acquisition channel is too limited to detect the full range of detectable signals.

Devices that include more than one acquisition channel, such as a low-sensitivity acquisition channel and a high-sensitivity acquisition channel, are becoming more common in everyday electronic products. For example, cellular telephones, game controllers, and other mobile devices incorporate microphones, gyroscopes, or other transducer-based devices (e.g., optical devices) configured to sense a wide range of input signals.

As an example, to sense this wide range signal, a microphone may include multiple membranes or multiple microphones, one with low sensitivity and one with high sensitivity, in a single package. As another example, a single sensor (e.g., a microphone membrane) with a relatively large sensitivity range may be provided as inputs to two different acquisition chains, each implementing a different amplification factor. This may result in a device that appears to have two or more acquisition channels with different sensitivities.

In general, low sensitivity acquisition channels enable detection of strong parts of the ambient signal (high amplitude), but do not handle weak parts of the signal well (low amplitude). The high sensitivity acquisition channel enables detection of weak parts of the signal (low amplitude), but does not process strong parts of the signal well.

In current devices with multiple acquisition channels, the control circuit acquires output signals of different sensitivities from the two channels simultaneously and adapts the signal strength by switching directly between high and low sensitivity signals.

However, this switching creates an undesirable discontinuity in the output signal. In particular, there may be a delay when switching between high and low sensitivity signals. As another example, when switching occurs, the difference between the noise floors associated with the high and low sensitivity signals, respectively, may be discernable (e.g., by a listener of the output signal switching between channels of the dual-channel microphone device). Furthermore, the control circuitry for the gain is often placed far from the sensor in the chain of signal processing and fails to compensate for the inherent limitations of the sensor.

Disclosure of Invention

The present disclosure relates to a multi-channel transducer device and an operating method thereof that maps a low-gain signal onto a high-gain signal when the high-gain signal is saturated to form a mixed signal and smoothly transitions into the mixed signal. The multi-channel transducer device may have at least two acquisition modules of different sensitivities. The acquisition module can detect the external force applied to the equipment in parallel and respectively output signals corresponding to different sensitivities. The device processes at least two of the signals of different sensitivities to determine a plurality of mapping parameters. The device uses the mapping parameters to generate a mixed signal representing the lower sensitivity signal mapped to the higher sensitivity signal. The device outputs a weighted average of one or more of the acquired signals and the mixed signal, where the weighting depends on, for example, the mode of operation and other factors. Because the mixed signal is generated from the higher sensitivity signal, the transition from the higher sensitivity signal to the mixed signal is smooth and free of discontinuities.

Drawings

The foregoing and other features and advantages of the present disclosure will be more readily understood as the same becomes better understood from the following detailed description when considered in connection with the accompanying drawings.

FIG. 1A is a block diagram of a true dual channel transducer assembly and signal processing stage of a device according to an example embodiment of the present disclosure;

FIG. 1B is a block diagram of an apparent dual channel transducer assembly and signal processing stages of an apparatus according to an example embodiment of the present disclosure;

FIG. 2 is a block diagram of the signal processing stage of FIGS. 1A and 1B;

FIG. 3 is a graph including a signal from a high gain channel, a signal from a low gain channel, and a resulting mixed signal according to an example embodiment of the present disclosure;

fig. 4A and 4B include graphical signal range representations of a low-gain channel and a high-gain channel in accordance with an example embodiment of the present disclosure;

FIG. 5 is a block diagram of a transducer assembly and signal processing stages performing parallel processing according to an example embodiment of the present disclosure;

FIG. 6 is an enhanced block diagram of the signal processing stage of FIG. 5;

FIG. 7 is a block diagram of a transducer assembly and signal processing stages performing sequential processing according to an example embodiment of the present disclosure; and

FIG. 8 is a representation of least squares optimization for determining mapping parameters according to an example embodiment of the present disclosure.

Detailed Description

In the following description, certain specific details are set forth in order to provide a thorough understanding of various embodiments of the present disclosure. However, it will be understood by those skilled in the art that the present disclosure may be practiced without these specific details. In other instances, well-known structures associated with electronic components and signal processing have not been described in detail in order to avoid unnecessarily obscuring the description of the embodiments of the disclosure.

Unless the context requires otherwise, throughout the description and the claims that follow, the word "comprise" and variations such as "comprises" and "comprising" are synonymous and are inclusive or open-ended (e.g., does not exclude additional, unrecited elements or method acts).

Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

As used in this specification and the appended claims, the singular forms "a", "an", and "the" include plural referents unless the content clearly dictates otherwise. It should also be noted that the term "or" is generally employed in its sense including "and/or" unless the content clearly dictates otherwise.

As used in this specification and the appended claims, the use of "corresponding" and "corresponding" is intended to describe the ratio or similarity between referenced objects. The use of "corresponding to" or one of its forms should not be understood to mean an exact shape or size.

In the drawings, identical reference numbers identify similar elements or acts. The sizes and relative positions of elements in the drawings are not necessarily drawn to scale.

Fig. 1A is a block diagram of a system 10 formed in accordance with an embodiment of the present disclosure. The system 10 is configured to provide a wide dynamic range signal by simultaneously acquiring information from multiple transducers having different sensitivities. The system 10 includes a transducer assembly 2, the transducer assembly 2 configured to output at least two channels: a high gain channel 16 and a low gain channel 14. The transducer assembly may be any device with multiple simultaneously acquired signals, such as devices for optical detection with image stability, inertial sensing devices such as dual-core gyroscopes with changeable time offsets and accelerometers with dual-core tracking and orientation, moving coil microphones and other MEMS (micro-electro-mechanical systems).

The transducer assembly 2 in fig. 1A comprises two

capacitive sensors

2a, 2b, wherein the first sensor 2a detects a weak part of the signal from the environment, such as a signal part with a low amplitude, and the second sensor 2b detects a strong part of the signal from the environment, such as a signal part with a high amplitude. Since the transducer assembly 2 does comprise two

different sensors

2a and 2b having different sensitivities, the transducer assembly 2 may be named a "true" dual channel transducer assembly.

Due to the different sensitivities, different amplification factors may be applied to the signals output by the

capacitive sensors

2a, 2 b. However, in some embodiments, the same amplification factor is applied to the signals output by the

sensors

2a, 2b, respectively.

These

capacitive sensors

2a, 2b may be any of a number of different types of capacitive sensors, such as two separate microphones in separate packages with different sensitivities, a microphone with two membranes included in a single package, or two optical sensors or two gyroscopes in a single package or separate packages. The

sensors

2a, 2b are configured to have different sensitivities, receiving and outputting signals in parallel, so as to acquire signals simultaneously.

The

sensors

2a, 2b detect the same signal from the environment but are processed simultaneously with two different acquisition chains. For example, the sensors detect the same acceleration, but with different accuracy or dynamic range. Alternatively, the sensors are microphones that detect the same sound with different sensitivities or dynamic ranges.

Each sensor is coupled to a respective processing stage 3a and 3b (collectively indicated as 3), the processing stages 3a and 3b being configured to receive the detection quantity from the corresponding

sensor

2a, 2b, respectively, and to output an electrical detection signal indicative of the input of the sensor. The sensor may be a digital or analog sensor. Both sensors receive the same analog signal. In some embodiments, different amplification factors are applied to the output of each sensor due to differences in sensitivity between sensors.

The combination of the first sensor 2a and the first processing stage 3a may be referred to as a first acquisition module 4 a. The combination of the second sensor 2b and the second processing stage 3b may be referred to as a second acquisition module 4 b. The first and

second acquisition modules

4a, 4b are configured to operate in parallel to simultaneously obtain information about the environment in which the system 10 operates.

In the embodiment shown in fig. 1A, the first processing stage 3a is coupled to the first sensor 2a (high sensitivity sensor) and is configured to output a high gain signal 16, which is also a high gain channel 16. The first processing stage 3a receives an analogue signal from the first sensor, which will typically be a low amplitude signal since the first sensor is configured to be highly sensitive. The first processing stage 3a will then process the low amplitude signal to output a high gain signal 16. The first processing stage 3a may comprise an analog-to-digital converter 8a and an amplifier (not shown).

Similarly, the second processing stage 3b is coupled to the second sensor 2b and is configured to output a low-gain signal 14, which may be referred to as a low-gain channel 14. The second sensor 2b has the ability to detect a strong part of the signal, which is balanced with the detection of a weak part of the signal by the first sensor 2 a. Since the first sensor 2a has the ability to detect a weak portion of the signal, it is difficult for the first sensor to accurately and precisely detect a strong portion of the signal. To increase the dynamic range of the transducer assembly 2, the second sensor 2b has the ability to detect strong portions of the signal, but it is difficult to accurately and precisely detect weak portions of the signal. The second processing stage 3b applies a low gain to the strong part of the signal to output a low gain signal 14. The second processing stage 3b may comprise an analog-to-digital converter 8b and an amplifier (not shown).

In some embodiments, the first and second processing stages 3a, 3b may comprise identical components, wherein the only difference is the amplification factor. In particular, each processing stage 3a, 3b may comprise an identical analog-to-digital converter 8a, 8 b. For example, both converters may be 10-bit converters or 12-bit converters. Furthermore, in some embodiments, the

sensors

2a, 2b are digital sensors and do not require subsequent ADC conversion as shown in fig. 1A.

In some embodiments, both the first ADC8a and the second ADC 8b are 12-bit analog-to-digital converters. The first and second ADCs 8a, 8b are configured to receive the analog signals from the

sensors

2a, 2b and output 12-bit digital signals.

The ADCs 8a, 8b sample the analog signal and provide a digital representation of the analog signal amplitude at each sample. Each sample is associated with determining the amplitude of the analog signal segment. The samples obtained by the ADC are equal sequence of analog signal segments, where each sample is a segment. The ADC analyzes the analog signal segments and outputs digital values representing the amplitude of the segments. The conversion involves quantization of the input signal.

The difference between the actual analog value and the quantized digital value is called quantization error. Errors are caused by rounding or truncation, and are often modeled as random signals called quantization noise (QNoise). Aspects of an ADC include its bandwidth, its measurable frequency range, its signal-to-noise ratio (SNR), and how accurately it can measure a signal with respect to noise. The number of bits used to represent the digital output determines the maximum SNR. This is because the smallest noise level is the quantization error.

The dynamic range of an ADC is limited by the resolution of the ADC, the number of output levels or bins (bins) into which it can quantize the signal. Resolution is typically expressed in bits or volts. The resolution determines the magnitude of the quantization error and thus the maximum possible average signal-to-noise ratio. The minimum change in voltage required to change the output is called the Least Significant Bit (LSB) voltage and the ADC resolution is equal to the LSB voltage.

In one embodiment, the first and second ADCs 8a, 8b are 12 bit converters. The maximum number of bins or quantization levels available for a 12-bit ADC is 4096 (i.e., 2)¹²4095 and bin 0 to bin 4095 equals 4096 bins). Accordingly, the high gain channel 16 is a 12-bit signal and the low gain channel 14 is a 12-bit signal. Different ADC resolutions may be utilized as an end application command.

The system 10 further includes a signal processing stage 12 that receives signals from a low gain path 14 and a high gain path 16. When the high-gain channel 16 is saturated or chopped, the signal processing stage 12 adjusts the output signal 18 to minimize discontinuities. In particular, the signal processing stage 12 generates a mixed signal 32 representing a low gain signal mapped onto a high gain signal. The signal processing stage 12 provides as the output signal 18 a weighted average of the mixed signal 32 and the high gain signal. Example structures and operations of the signal processing stage 12 are further discussed with reference to fig. 2-8.

Fig. 1B is a block diagram of a system 210 formed in accordance with an embodiment of the present disclosure. The system 210 is configured to provide at least two signal channels with different sensitivities from a single sensor 201. The system 210 includes a transducer assembly 202 configured to output at least two channels, a high gain channel 16 and a low gain channel 14. The transducer assembly 202 may be any device that acquires signals, such as devices for optical detection using image stabilization, inertial sensing devices, microphones, and other MEMS (micro-electro-mechanical systems).

The transducer assembly 202 in fig. 1B includes a single capacitive sensor 201, the sensor 201 having, for example, a relatively large signal sensitivity range. The capacitive sensor 201 may be any of a number of different types of capacitive sensors, such as a microphone, a gyroscope sensor, or an optical sensor.

The sensor 201 is coupled to two

different processing stages

203a and 203b, the

processing stages

203a and 203b being respectively configured to receive a detection quantity from the sensor 201 and to output an electrical detection signal indicative of an input of the sensor 201. The sensor 201 may be a digital or analog sensor.

In the embodiment shown in fig. 1B, the first processing stage 203a is coupled to the sensor 201 and is configured to output a high gain signal 16, which is also a high gain channel 16. The first processing stage 203a receives the analog signal from the sensor 201 and will then process the signal to output a high gain signal 16. The first processing stage 203a may include an analog-to-digital converter 208a and an amplifier (not shown). In particular, the amplifier of the first processing stage 203a will provide amplification of the low amplitude portion of the signal from the sensor 201 to help generate the high gain signal 16.

Similarly, the second processing stage 203b is coupled with the sensor 201 and configured to output a low-gain signal 14, which may be referred to as a low-gain channel 14. To increase the dynamic range of the transducer assembly 202 (i.e. to provide at least two channels with different sensitivities), the second processing stage 203b applies a lower gain to the signal received from the sensor 201 than the gain applied by the first processing stage 203 a. The second processing stage 203b may include an analog-to-digital converter 208b and an amplifier (not shown). In other embodiments, the processing stage 203b does not include amplifying means at all.

The combination of the sensor 201 and the first processing stage 203a may be referred to as a first acquisition module 204a or a first acquisition chain. The combination of the sensor 201 and the second processing stage 203b may be referred to as a second acquisition module 204b or a second acquisition chain. The first and

second acquisition modules

204a, 204b are configured to operate in parallel to simultaneously provide information about the environment in which the system 210 operates. Since the transducer assembly 202 includes a single sensor 201 but outputs two channels with different sensitivities, the transducer assembly 202 may be named an "apparent" dual channel transducer assembly.

In some embodiments, the first and

second processing stages

203a, 203b may comprise identical components, with the only difference being the amplification factor (e.g., the amplification factor of the amplifier components included in processing stage 203a may be substantially greater than the amplification factor of the amplifier components included in processing stage 203 b). However, each

processing stage

203a, 203b may comprise identical analog-to-

digital converters

208a, 208 b. For example, both converters may be 10-bit converters or 12-bit converters.

The system 10 includes a signal processing stage 12 that receives signals from a low gain path 14 and a high gain path 16. The signal processing stage 12 shown in fig. 1B is identical to the signal processing stage 12 shown in fig. 1A.

Furthermore, although fig. 1A and 1B illustrate dual channel transducer assemblies, the systems of the present disclosure may include transducer assemblies having any number of different sensitivity channels. For example, a system with four different channels of different sensitivities will be discussed with reference to fig. 5-7.

Referring again to fig. 1A, any strong signal detected by first sensor 2a may cause processing circuit 3a to saturate, clip, or otherwise not output the detected complete analog signal due to analog-to-digital conversion and the limitation of high gain applied by first processing circuit 3 a. Such saturation and clipping may also occur with respect to the high gain signal 16 output by the first acquisition module 204a of fig. 1B.

By way of example, fig. 3 provides a graphical representation of high gain signal 16, including region 22, in which high gain signal 16 is truncated, i.e., high gain signal 16 does not represent or otherwise output the complete signal received by the high sensitivity acquisition module. Region 22 represents upper and lower thresholds corresponding to upper and lower limits of the output of the high gain information (i.e., where the high gain signal will saturate).

Low-gain signal 14 includes a signal component having a higher amplitude than the signal component captured and output on high-gain signal 16. Accordingly, the low gain signal 14 is not amplified much because the signal is already strong enough from the transducer. As seen in fig. 3, low gain signal 14 has a lower amplitude than the high gain signal and still is within a range between the upper and lower thresholds indicated by region 22.

The low gain channel 14 is provided for low sensitivity detection and covers a wide dynamic range. Saturation is unlikely for low sensitivity acquisition modules. When the signal input to the transducer is only a very low amplitude component, the first transducer 2a cannot detect the low amplitude component, and therefore the low gain signal may appear flat, as shown for example by the low gain channel 14 in region 34 in fig. 3. One factor associated with flat region 34 is the signal-to-noise ratio of the low amplitude signal. As can be seen in fig. 3, the high gain channel 16 is able to detect changes in the low amplitude signal. The high gain channel 16 is provided for high sensitivity detection requiring greater amplification, which may result in clipping (see region 22).

However, switching directly between the low-gain channel 14 and the high-gain channel 16 may result in a discernable delay or discontinuity in signal amplitude. For example, if the device switches directly from the high gain signal 16 to the low gain signal 14 during the region 22, there will be a significant amplitude reduction and other signal characteristics.

As such, the system of the present disclosure may generate the mixed signal 32, in accordance with aspects of the present disclosure. The mixed signal 32 represents the low-gain signal 14 mapped to the high-gain signal 16. Switching between the high gain signal 16 and the mixed signal 32 will not cause any discontinuities.

Referring again to fig. 1A, in operation, the first and

second sensors

2a, 2b simultaneously receive input from the surrounding environment. The processing stages 3a, 3b process the signals from the first and

second sensors

2a, 2b simultaneously, so that the signal processing stage 12 collects the signals from the high-gain and low-

gain channels

14, 16 simultaneously.

The input received by the

sensors

2a, 2b may be constantly changing, so the signals on the high and low gain channels are rapidly changing signals. The present disclosure relates to systems and methods for processing rapidly changing and outputting a smoothed signal representing the high dynamic range of system 10.

Referring now to fig. 2, the signal processing stage 12 includes various components that analyze the low gain signal 14 and the high gain signal 16, generate a mixed signal 32, and automatically determine and output a weighted average of the high gain signal 16 and the mixed signal 32. Specifically, the high gain signal 16 is provided to a signal averaging block 24 and a signal analysis block 26. The low gain signal 14 is provided to a signal analysis block 26 and a signal mapping block 28. The signal analysis block 26 outputs one or more signals to a smoothing filter 30, the smoothing filter 30 being coupled to the signal mapping block 28. The mixed output signal 32 of the signal mapping block 28 is provided as a second input to the signal averaging block 24. In some embodiments, as shown in fig. 2, one or more outputs of the signal analysis block 26 are provided to the signal averaging block 24. In still other embodiments, the output of the smoothing filter 30 is provided to the signal averaging block 24 in addition to or instead of the output of the signal analysis block 26.

Signal analysis block 26 analyzes high gain signal 16 and low gain signal 14 to determine a plurality of mapping parameters. For example, the plurality of mapping parameters may describe a linear relationship between the high gain signal 16 and the low gain signal 14. The signal mapping block 28 uses a plurality of mapping parameters to map the low gain signal 14 to the high gain signal 16 and generate a hybrid signal 32. The signal averaging block 24 outputs a weighted average of the high gain signal 16 and the mixed signal 32. The weighting used by the signal averaging block 24 may vary over time (e.g., on a per-sample basis), with the weighting depending on, for example, the mode of operation, mapping parameters, and/or other factors.

As mentioned above, aspects of the signal processing stage 12 may be implemented at a higher system level than the circuit level, such as in software or algorithms. The signal processing stage 12 provides high dynamic range sensing without the need for automatic gain control. This system is particularly advantageous for the following devices: devices with optical detection with image stabilization, optical heart rate monitoring, inertial sensing devices with variable offset, dual-core gyroscopes or accelerometers, or high dynamic range microphones. For example, a dual-core gyroscope may have a time-varying offset that may be processed and smoothed with the system described in this disclosure.

The system of the present disclosure addresses problems from existing equipment by automatically generating a hybrid signal 32 from the low-gain signal 14 and the high-gain signal 16. For example, in some embodiments, after verifying that the low-gain signal is not flat and the high-gain signal is not saturated, the mixed signal 32 is generated based on calibration samples derived from the low-gain signal 14 and the high-gain signal 16. The verification may be performed in the signal processing stage 12, which may be implemented in software. Alternatively, the verification may be performed in one or more of the blocks. For example, the signal analysis block 26 may identify whether the high gain signal 16 is chopped or whether the low gain signal 14 is flat. This verification may also be performed in the signal averaging block 24 for the high gain signal 16 or in the signal mapping block 28 for the low gain signal.

Previous systems with a single signal sensitivity or acquisition channel do not allow for correct, complete detection of the signal, and the control stage of the gain is often arranged too far along the signal processing chain to successfully compensate for the limitations of the single signal. One solution is to acquire two signals simultaneously and switch back and forth between the signals; however, the switching causes unwanted discontinuities detectable in the final output signal. With respect to exacerbating this problem, the discontinuities often deteriorate with time and age of the device.

In previous systems, some solutions include providing automatic gain control and offset tracking, such as DC compensation. These solutions may not work if the change in the detected signal is too fast, so no signal is acquired or the signal is flat or chopped. The automatic gain control measures the strength of the signal and then adapts based on the strength of the signal; however, if the change in the signal is too fast, the automatic gain control may not be able to hold and the output will be flat or clipped. If the solution works, the acquired signal may change over time, such as with amplitude modulation and baseline drift.

In the system of the present disclosure, signal processing circuit 12 is adapted to quickly and efficiently transition from high gain signal 16 to mixed signal 32 without interruption in output signal 18. Each of the components in the signal processing circuit 12 work together to output a smoothed output signal 18. It is optional that the smoothing filter 30 may be configured as a low pass filter to reject high speed changes in the signal. However, the smoothing filter 30 may be a band pass filter in other embodiments. In particular, the smoothing filter may be any component that stabilizes the output of the signal analysis block 26. It may be linear or non-linear, i.e. it may have memory or hysteresis. The smoothing filter 30 may be fixed or tunable. The filter 30 may be an Infinite Impulse Response (IIR) or Finite Impulse Response (FIR) filter. It may also be an IIR standard or IIR wave digital filter. In some embodiments, the smoothing filter 30 may be implemented as regularization logic.

The signal averaging block 24 may have multiple modes for selection or combination of the high gain signal 16 to the mixed signal 32.

As an example, in some embodiments, the signal averaging block 24 is configured to output the high-gain signal 16 until the high-gain signal is saturated (e.g., to provide a weighted average output signal 18 in which the high-gain signal 16 is weighted with a one value and the mixed signal 32 is weighted with a zero value). When the high-gain signal 16 is saturated, the signal averaging block 24 may transition to output the mixed output signal 32 (e.g., providing a weighted average output signal 18 in which the high-gain signal 16 is weighted with a zero value and the mixed signal 32 is weighted with a one value), which allows the system to output a high amplitude signal above the threshold of the high-gain signal 16. The transition from the high gain signal to the mixed output signal 32 is a smooth transition without clipping or distortion.

As another example, in some embodiments, the signal averaging block 24 is configured to detect when the high gain signal 16 tends towards an upper or lower threshold associated with clipping. When the high gain signal approaches the upper or lower threshold, the signal averaging block 24 switches the output from the high gain signal 16 to the mixed signal 32. The signal averaging block 24 may quickly and smoothly transition from the high gain signal to the mixed signal 32. For example, in some embodiments the signal mapping block 28 continuously generates the mixed signal 32. Thus, the signal averaging block 24 constantly receives the mixed signal 32 and can transition to such a signal without discontinuities when desired.

In still other embodiments, when the signal averaging block 24 detects that the high-gain signal 16 tends toward an upper or lower threshold associated with the clipping, the signal averaging block 24 may transition from the high-gain signal 16 to the mixed signal 32 through a series of stages in which the weight applied to the high-gain signal 16 decreases and the weight applied to the mixed signal 32 increases as the high-gain signal 16 approaches the upper or lower threshold. This may advantageously provide an even smoother transition from the high gain signal 16 to the mixed signal 32.

In another example, the signal averaging block 24 may monitor whether the mixed signal 32 is greater than or equal to the high gain signal 16. If the mixed signal 32 is greater than or equal to the high gain signal 16 and/or the high gain signal 16 is chopped, the signal averaging block 24 will output the mixed signal 32. Otherwise, the high gain signal 16 is output.

In another example, if high gain signal 16 is not chopped and low gain signal 14 is not flat, signal averaging block 24 may output a weighted average of high gain signal 16 and mixed signal 32, where the weights applied to

signals

16 and 32, respectively, are both non-zero. The non-zero weights may be selected from a discrete number of available weights, from a spectrum of values of available weights, or calculated based on various input or operating parameters.

As an example, the signal averaging block 24 may calculate the weights applied to the

signals

16 and 32 in this scenario based on the signal-to-noise ratios associated with

such signals

16 and 32. The signal-to-noise ratio can be estimated based on the amplitudes of the original high-gain and low-gain signals. However, if the high gain signal 16 is not truncated and/or the low gain signal 14 is flat, the signal averaging block 24 will output the high gain signal 16.

Further, according to aspects of the present disclosure, in some embodiments, the signal processing stage 12 operates on a per-sample basis. Thus, for each instance in which the first and second ADCs 8a and 8b output new values (i.e., samples) of the high and low gain signals 16 and 14, respectively, the signal processing stage 12 may recalculate or otherwise re-evaluate the available factors or parameters to re-determine the mapping parameters and regenerate the mixed signal 32 and the weighted average output signal 18. However, in other embodiments, certain portions of the signal processing stage 12 (such as, for example, the signal averaging block 24) may operate on a per-sample basis, while other portions of the signal processing stage 12 (such as, for example, the signal analysis block 26 and/or the signal mapping block 28) may operate at a sampling interval of N calibration samples, where N is an integer greater than 1. This may be particularly true when system conditions are good.

One feature of the signal analysis block 26 is a least squares optimization module configured to determine a plurality of mapping parameters (K (0), K (1), … K (m)). The number of mapping parameters will be treated as M + 1. The mapping parameters are detected from the high gain signal 16 and the low gain signal 14 using a least squares optimization.

In particular, signal analysis block 26 may determine the mapping parameters based on a plurality of calibration samples of high gain signal 16 and low gain signal 14. One example process for selecting calibration samples is discussed further below with reference to fig. 4A and 4B. One example process for determining mapping parameters based on calibration samples is discussed further below with reference to fig. 8.

The determined mapping parameters are then utilized by the signal mapping block 28 to generate the mixed signal 32.

As discussed above, the mapping parameters may be generated or detected for each sample of the high gain channel 16 and the low gain channel 14, or may be determined for several calibration samples N. The number of mapping parameters M +1 may be less than or equal to the number of calibration samples N used to determine the mapping parameters. For example, in some embodiments, the mapping parameters include two parameters: gain and offset, so M is 1, where K (0) is offset and K (1) is gain.

More specifically, the mapping parameters may be viewed as coefficients representing a linear relationship between the high-gain signal and the low-gain signal. For example, the first coefficient K (0) may be an offset, the second coefficient K (1) may be a gain, and the third coefficient K (2) may be a signal power. The number of coefficients or mapping parameters may vary depending on the information extracted from the original signal and the system design.

More generally, the linear relationship between the high-gain signal and the low-gain signal can be generally represented by the following equation:

for the special case where M ═ 1, the linear relationship between the high gain signal and the low gain signal can be expressed as follows:

H＝L⁰K(O)+L¹K(1)＝K(0)+L¹K(1)(2)

in general, the coefficient K (0) may be referred to as "offset" and the coefficient K (1) may be referred to as "gain". Thus, one example application of equation 2 may be expressed as follows:

h ═ L ═ gain + offset (3)

This is a simple representation of a linear relationship, where the high gain signal is approximated as the low gain signal multiplied by the gain plus the offset; however, more complex relationships can be extracted from the signal, based on the complexity of the system. Extracting more complex relationships may result in a number of mapping parameters (M +1) greater than 2. The system and method of the present disclosure may be advantageously applied to any number of mapping parameters (M + 1).

Fig. 4A includes a representation of the analog signals in the first ADC8a (see below graph) and the second ADC 8b (see above graph). Hereinafter, the high gain signal will be referred to as H_nAnd the low gain signal is referred to as the lower L_n. The signal analysis block 26 always receives and processes the 12-bit high gain signal 16 and the low gain signal 14. Accordingly, the system never blindly or prevents output of the output signal 18. However, when the low-gain signal is not flat and the high-gain signal is not truncated (e.g., signals 16 and 14 are both present in and overlap the resolution region), the signal analysis block 26 only selects calibration samples, as will be discussed further below.

As shown in fig. 4A, both the high gain ADC8a and the low gain ADC 8b have a number of bins and quantization levels corresponding to the digital output value for each sample of the analog signal. Fig. 4A is a simplified representation of the number of bins, so fig. 4A only shows 7 bins 36 for each of the first and second ADCs. In the example mentioned above, both the first and second ADCs 8a, 8b are 12-bit converters with a maximum of 4096 bins, where the minimum number of bins is 0. If a portion of the signal is in one of the bins for a sample, the ADC outputs a value associated with that bin. The 12-bit output of the ADC will represent the particular bin in which the signal is present.

The first signal range representation 45 and the second signal range representation 47 represent the range of the high gain signal and the low gain signal, respectively. For example, in the analog domain this range may be from 0V or ground to a 3V supply voltage.

For low gain signals 14, the center region 34 of the bin is associated with where the analog signal is considered flat or within a specified range of digital values. In the digital domain, all changes in this central region 34 may or may not have the same value, depending on whether the central region 34 corresponds to one bin or to a plurality of bins.

Central zone and central upper Threshold (TH)_CentralUpper) And a central lower Threshold (TH)_CentralLower) There is a relationship. The central region is the region of the ADC output that does not provide a useful signal in the digital domain for the low gain channel 14, i.e. the variation in amplitude in this region is not large enough to exceed the limits of the central region and therefore appears flat. The signal in the central region is not used to determine the mapping parameters (i.e. is not selected as a calibration sample). In one embodiment, the limits of the central region 34 are determined by:

TH_CentralUppermean value + range/nr (4)

TH_CentralLowerMean value-range/nr (5)

The average is the signal average and can be represented by the maximum number of bins plus the minimum number of bins divided by 2. For example, in the case of a 12-bit converter, the signal average may be 1023. However, in other embodiments, the signal average may not be the maximum plus minimum divided by 2, as the average is typically dependent on the input signal parameters. It is noted that the signal averages for the high-gain and low-gain channels may be different.

The range represents the range, maximum and minimum values of the amplitude of the signal. As the range is expanded, the restriction of the central region is also expanded. The threshold of the central region 34 is constantly evaluated and adjusted (e.g., by the signal analysis block 26) according to the parameters of the system. In particular, the parameters of the input signal may be constantly changing, and thus the threshold will be changing. This allows the system to continually adjust the regions representing poor quality signals to avoid using samples of these poor quality signals as calibration samples for use in forming the mixed signal.

The variable nr depends on the parameters of the system and can be chosen to optimize the size of the central region. For example, in the case of a 12-bit ADC, nr may be set to 4. Some systems may choose to make the central region larger to avoid any potentially sub-optimal output signal. As the analog signal becomes closer to the central region 34, the signal has a lower quality.

For high gain signals, the signal range representation 45 includes the upper region 40 and the lower region 42 of the bin, and is associated with where the signal is considered saturated. Upper region and upper Threshold (TH)_Upper) Associated with the lower Threshold (TH)_Lower) There is a relationship. The upper region 40 may be referred to as an overflow cutoff and the lower region 42 may be referred to as an underflow cutoff. Any portion of the signal in or above the upper region, or in or below the lower region, may be distorted and therefore not used by the system as a calibration sample to determine the mapping parameters. Furthermore, when it is chopped, the high gain signal is not output by the system.

In one embodiment, the limits of the upper and

lower regions

40 and 42, respectively, are determined by the following equation:

TH_Uppercano max bin-nc (6)

TH_LowerNo. min bin + nc (7)

The maximum number of bins is determined by the number of bits of the ADC. For example, for a 12-bit ADC, the maximum number of bins is 4096 and the minimum number of bins should be 0. Like the variable nr, nc depends on the parameters of the system and may be selected to optimize the size of the upper and

lower regions

40, 42. In one embodiment, nc may equal 128 in the case of a 12-bit ADC.

Both the high gain signal and the low gain signal have high signal quality away from the upper and

lower regions

40, 42, respectively, and away from the central region 34. As the high gain signal approaches the upper and

lower regions

40, 42, the signal quality diminishes. Accordingly, when the high gain signal approaches the upper and lower regions, the system selects a value for the variable nc that avoids utilizing a lower quality signal. The same is true for the central region 34, where the low gain signal loses quality as it approaches the central region. When determining the mapping parameters for generating the hybrid signal, the system selects values for the variable nr to take advantage of the best part of the signal.

Fig. 4B provides an illustration of how auto-calibration is used to select calibration samples from the high and low gain signals after the limits or thresholds for the upper, lower, and center regions are identified. In particular, fig. 4B illustrates the identification of overlapping

resolution areas

112 and 114 from which calibration samples are selected.

The difference in amplification factor between the high and low gain channels may be used in determining the auto-calibration and identifying the overlapping resolution region. For example, if the high gain channel amplifies the original signal by a factor of 10 and the low gain channel amplifies the original signal by a factor of 2, the difference in amplification factor is 5. Specifically, fig. 4B includes a third signal range representation 100, a fourth signal range representation 102, a fifth signal range representation 104, a sixth signal range representation 106, and a seventh signal range representation 108.

The third signal range representation 100 represents a low gain signal. Specifically, the third signal range representation 100 is substantially similar to the second signal range representation 47 and includes the central region 34. Again, it is emphasized that the central region 34 need not be located at the center of the low gain signal range, but instead generally corresponds to the average position of the low gain signal.

The third signal range representation 100 further comprises upper and lower limiting regions 35a and 35 b. In general, low gain signal values included in the central region 34 should not be used because they represent a flat signal and have a low signal-to-noise ratio. Likewise, low gain signal values included within upper limit region 35a or lower limit region 35b are unreliable because they may include distortion. Therefore, the low gain signal values included in these regions should not be selected as calibration samples for use in determining the mapping parameters.

The fourth signal range representation 102 represents an adjustment or expansion of the low gain range represented in the third signal range representation 100 so that it can be meaningfully compared to samples from the high gain channel. For example, the representation 100 may be multiplied or otherwise extended by the difference in magnification factor as discussed above. Alternatively, the most recently determined mapping parameters may be used to expand the representation 100 into the representation 102.

Thus, the fourth signal range representation 102 represents a low gain signal range that is scaled for comparison with a high gain signal range. The fourth signal range representation 102 comprises a central region 34, an upper limit region 35a and a lower limit region 35b, from which no calibration sample should be selected.

The fourth signal range representation 102 further comprises a first extended low resolution area 43a between the upper limiting area 35a and the central area 34 and further comprises a second extended low resolution area 43b between the lower limiting area 35b and the central area 34. The first and second extended

low resolution areas

43a and 43b represent high quality or otherwise reliable low gain signal portions.

The seventh signal range representation 108 represents a high gain signal. Specifically, the seventh signal range representation 108 is substantially similar to the first signal range representation 45 and includes the upper region 40 and the lower region 42. As discussed above, any portion of the high gain signal in or above the upper region 40, or in or below the lower region, may be distorted or otherwise truncated. Therefore, the calibration sample should not be selected from these

regions

40, 42.

The remaining portion of the seventh signal range representation 108 may be named the normal high resolution area 41. The normal high resolution area 41 represents a high gain signal portion that is high quality or otherwise reliable.

In some embodiments, the central region (not numerically called out) may be defined within the normal high resolution region 41 by a process similar to the process of identifying the central region 34. In such embodiments, the high gain signal values included in the central region may be ignored or otherwise not selected when they may correspond to a flat signal. However, in practice, the extended central region 34 will generally contain any central region defined within the normal high resolution region 41. Thus, due to the operation of the central region 34, no calibration sample will be selected from the portion of the normal high resolution region 41 corresponding to the average signal value.

The sixth signal range representation 106 is simply a representation of the high-gain signal range on the extended scale associated with the fourth signal range representation 102, as represented by the seventh signal range representation 108. However, the

regions

40, 41 and 42 are not themselves expanded. Thus, it is the case that the sixth signal range representation 106 corresponds to the seventh signal range representation 108, wherein the additional space is shown for regions not included in the range of the high gain signal but included in the range of the low gain signal when extended for comparison with the high gain signal.

The fifth signal range representation 104 is a combination of the fourth signal range representation 102 and the sixth signal range representation 106. In particular, the fifth signal range representation 104 identifies and includes two overlapping

resolution areas

112 and 114. The first overlap resolution area 112 is an intersection area of the first extended low resolution area 43a and the normal high resolution area 41. Likewise, the second overlap resolution area 114 is an intersection area of the second extended low resolution area 43b and the normal high resolution area 41.

Thus, the overlapping

resolution areas

112 and 114 define portions of the high gain and low gain signals that represent high quality and reliable values of these signals, respectively. Thus, the values of the high-gain and low-gain signals are particularly advantageous for use in determining the mapping parameters when both high-gain and low-gain signals are present in either of the overlapping

resolution regions

112 and 114.

As such, in some embodiments of the present disclosure, the signal analysis block 26 may determine (e.g., on a per-sample basis) whether high-gain and low-gain signals are present in either of the overlapping

resolution regions

112 and 114 at the same time. If it is determined that the signals are in one of the

regions

112 and 114, the values of these signals may be collected, stored, or otherwise selected for use as calibration samples. The selected calibration samples are then used to determine the mapping parameters.

Furthermore, as described above, the various thresholds and regions shown in fig. 4A and 4B may be continuously updated or otherwise recalculated (e.g., on a per-sample basis). Thus, the overlapping

resolution regions

112 and 114 may be continuously changing, and they represent portions of an auto-calibration process in which the selection of calibration samples is continuously refined or otherwise affected based on the current properties of the high-gain and low-gain signals.

In addition, as described above, auto-calibration is used to achieve a higher dynamic range with a smooth output signal in the system 10. Thus, in addition to guiding the selection of calibration samples, auto-calibration may also be used to help achieve an automatic transition from the high-gain channel 16 to the mixed signal 32 when the high-gain channel 16 is saturated. For example, in some embodiments, determining that high-gain and/or low-gain signals are present in one or more of the particular regions shown in fig. 4B may affect the selection of weights used by signal averaging block 24 to provide output signal 18. As another example, by monitoring these overlap regions, the system can detect whether there is a possibility that the high gain signal will soon saturate, thereby ensuring that the transition is smooth and no discontinuity is detected in the output.

Having discussed one example process for selecting high quality calibration samples, an example process for determining mapping parameters using calibration samples will now be discussed with reference to fig. 8.

In the digital domain, the high resolution signal corresponds to a high gain signal after analog-to-digital conversion, and the low resolution signal corresponds to a low gain signal after analog-to-digital conversion. There is a linear relationship between the high resolution signal and the low resolution signal that corresponds to a linear relationship between the low gain signal and the high gain signal prior to analog-to-digital conversion. The high resolution signal will typically be the best quality signal except when the high resolution is saturated or otherwise too large.

To determine the mapping parameters, the signal analysis block 26 performs the least squares optimization mentioned above. Least squares optimization utilizes a linear relationship between the high gain signal and the low gain signal. In particular, least squares optimization is performed based on the high/low resolution relationship of the digital domain. In particular, one example formulation of a linear relationship between high resolution and low resolution signals may be generally represented by the following equation:

high resolution ═ low resolution ═ gain + offset (8)

The two unknowns in this equation are gain and offset. By using data from multiple calibration samples N of the analog-to-digital converter, the least squares optimization is performed periodically or on a per-sample basis.

Fig. 8 is a representation of how least squares optimization can be used to determine the mapping parameters for this system, where sh (x) represents the high resolution value for each sample, and sl (x) represents the low resolution value for each sample. Least squares optimization is used to determine the unknowns, i.e., the mapping parameters contained in the high-gain and low-gain signals.

Thus, the least squares optimization shown in FIG. 8 is representative of one example scenario in which only two mapping parameters are solved: gain and offset. However, any number of mapping parameters may be solved using similar techniques. Thus, in the first equation 120 shown in fig. 8, there are two unknowns: gain and offset (Ofs). In other embodiments, there may be additional unknowns.

The linear relationship between the high resolution signal sH and the low resolution signal sL is represented by equation 120. The low resolution signal has two matrix components: sL¹And sL⁰And is represented by a 1 × 2 matrix. In general, the zero power of sL is equal to 1. To map the low resolution signal to the high resolution signal, the low resolution signal matrix is multiplied by a matrix of gains and offsets. The gain and offset are represented by a 2 x 1 matrix.

After both signals have passed through the amplification stage, the signal processing circuit 12 is configured to use this relationship to determine mapping parameters like gain and offset. Once the gain and offset are determined, the system forms a hybrid signal from the low-gain signal and the determined mapping parameters.

By processing a set of calibration samples, the system can constantly process and generate mapping parameters. Alternatively, the system may determine the mapping parameters intermittently, such as when a change in signal range is detected.

The second equation 122 of fig. 8 represents a more complex relationship between high resolution and low resolution signals. In particular, the high resolution matrix 124 of nx 1 represents several high resolution outputs of every N calibration samples of the analog-to-digital converter. The low resolution matrix 126 is an N × 2 matrix that includes a low resolution output every N calibration samples. Thus, in some embodiments, only high quality calibration samples are used to fill or otherwise occupy

matrices

124 and 126.

The low resolution matrix 126 is multiplied by a matrix 128 of mapping parameters which is a 2 x 1 matrix. The mapping parameters shown in the mapping parameter matrix 128 are gain and offset; however, as described above, the system may determine a greater number and type of mapping parameters, depending on the complexity of the analysis. There are many parameters in the linear relationship between the high-gain and low-gain channels, and the number of parameters selected for detection may vary.

A series of

equations

130, 132, 134, 136 are represented visually in fig. 8. These equations can be easily implemented in software to process data from such a system to generate the mapping parameters. Alternatively, in some embodiments, only the last equation 136 is implemented in software in each case of mapping parameter determination.

The first equation 130 includes an N × 1 matrix including N high resolution calibration samples according to a linear relationship of the high resolution matrix 124 and the low resolution matrix 126. The first equation 130 includes an N × 2 matrix representing the low resolution matrix 126. The low resolution matrix 126 is multiplied by a 2 x 1 matrix of mapping parameters (unknowns in equations 122 and 130). The leftmost column of low-gain matrix 126 may represent N low-gain samples, while the rightmost column may represent the signal to the power of zero (e.g., N matrix entries of 1).

To solve for the unknowns, the system multiplies both sides of the first equation 130 by a 2 × N matrix, which is the transpose of the matrix 126, see second equation 132. The square matrix 138 is generated by multiplication of the low resolution matrix 126(N × 2) and the transpose of the matrix (i.e., a 2 × N matrix). The square matrix 138 is generated such that an inverse of the square matrix 138 can be used to solve the mapping parameters 128, see equation 136.

The square matrix 138 includes the sum of the calibration samples from the low gain channels in both the lower left cell 803 and the upper right cell 802. The upper left cell 801 of the square matrix 138 represents the sum of the squares of each of the calibration samples from the low gain channels. The lower right cell 804 includes a value equal to the number N of calibration samples.

The values included in the cells may be named accumulator values and may be recalculated or otherwise updated for each new calibration sample. For example, the accumulator value in each of units 801 through 804 may be updated as follows:

accumulator₈₀₁(n) accumulator₈₀₁(n-1)+sL(n)^2(9)

Accumulator₈₀₂(n) accumulator₈₀₂(n-1)+sL(n)(10)

Accumulator₈₀₃(n) accumulator₈₀₃(n-1)+sL(n)(11)

Accumulator₈₀₄(n) accumulator₈₀₄(n-1)+1(12)

Regarding the other two matrices on the left hand side of equation 136, these matrices represent a horizontal rectangular matrix made up of the powers of the low-gain calibration samples (where the top row is the power of 1 and the bottom row is the power of 0 (i.e., 1)) multiplied by a vertical rectangular matrix made up of the high-gain calibration samples. Such a matrix multiplication (2 × N matrix multiplied by 1 × N matrix) results in a 2 × 1 matrix that can be maintained with two additional accumulator values, as follows:

accumulator₅(n) accumulator₅(n-1)+sL(n)*sH(n)(13)

Accumulator₆(n) accumulator₆(n-1)+sH(n)(13)

The matrix on the left-hand side of equation 136 may be updated at each input sample from the analog-to-digital converter (e.g., by an update of the accumulator value). The inversion shown in the fourth equation 136 (i.e., the solution of equation 136) may be performed on every N calibration samples, especially when the system is in good condition, or may be performed on a per sample basis. Using least squares optimization allows the system to process thousands of data points, while only information about 8 has to be stored: six accumulators and determined mapping parameters (gain and offset). In some embodiments, the accumulator value is never or only rarely reset. In other embodiments, the accumulator value is periodically reset or zeroed. In still other embodiments, a moving window of N calibration values is used.

The system can easily solve the mapping parameters using least squares optimization. This technique is beneficial because only the fundamental matrix operation is required to solve the mapping parameters. Once determined, the mapping parameters are provided to the signal mapping block 28 in fig. 2 to generate the mixed signal 32. The signal mapping block 28 is configured to remap or combine the low gain signals 14 with the detected parameters. For example, the signal mapping block 28 may perform the following formula, where L' is the mixed or modified output signal 32 and L is the low gain signal 14.

L′＝K(0)+K(1)*L¹+…+K(M)*L^M(14)

Fig. 5 relates to a high dynamic range system 51 according to an alternative embodiment of the present disclosure, which is configured to receive an input signal 50, such as an analog signal representing sound or rotation, in a transducer assembly 49. The transducer assembly 49 includes four

sensors

60, 62, 64, 66, each having a different sensitivity. The dynamic range of the system can be increased by including more transducers. In other embodiments, the transducer assembly 49 is an apparent multi-channel transducer, rather than a true multi-channel transducer as shown.

The first sensor 60 is coupled with the first processing circuit 70 and outputs a first channel 80. The second sensor 62 is coupled to the second processing circuit 72 and outputs a second channel 82. The third sensor 64 is coupled to the third processing circuit 74 and outputs a third channel 84. Fourth sensor 66 is coupled with fourth processing circuitry 76 and outputs a fourth channel 86. Since each of the sensors is of different sensitivity, each of the processing circuits will apply a different gain to provide four simultaneously acquired channels to be processed by the signal processing stage 53.

As mentioned above, difficulties arise in transitioning between different channels associated with multiple transducers. This system 51 is configured to smoothly transition between four different channels to produce an output signal 58 that includes the lowest discontinuity.

In one embodiment, the first sensor 60 may be an extremely sensitive sensor configured to detect very weak signals. The second sensor 62 may also be a sensitive sensor configured to detect weak signals in a different frequency range than the first sensor 60. Since both the first and

second sensors

60, 62 are configured to detect weak signals, the first and

second processing circuits

70, 72 may apply higher gains to amplify the weak signals and output a first channel 80 and a second channel 82, which are the highest gain channel and the high gain channel, respectively.

The third sensor 64 may be a sensor configured to detect a stronger signal and the fourth sensor 66 may be configured to detect a stronger signal than the third sensor. The third and

fourth processing circuits

74, 76 are configured to process the stronger signals and provide appropriate amplification for the received signal strength. The third processing circuit is configured to output a third channel 84, which is a low gain signal. The fourth processing circuit is configured to output a fourth channel 86, which is the lowest gain signal of this system 51.

The signal processing stage 53 comprises a first signal analysis and averaging block 90 coupled to the first channel 80 and the second channel 82. The signal processing stage 53 further comprises a second signal analysis and averaging block 92 coupled to the third channel 84 and the fourth channel 86. The operation of the first and second signal analysis and averaging blocks is described in more detail with respect to fig. 6.

The first signal analysis and averaging block 90 outputs a first intermediate signal 94, which is a mixed version of the first channel 80 and the second channel 82. The second signal analysis and averaging block 92 outputs a second intermediate signal 96, which is a mixed version of the third channel 84 and the fourth channel 86.

A third signal analysis and averaging block 98 receives the first intermediate signal 94 and the second intermediate signal 96 and provides the output signal 58. As can be seen in more detail in fig. 6, the third signal analysis and averaging block 98 will output the first intermediate signal 94 unless it is saturated or truncated. If the first intermediate signal 94 is truncated, the third signal analysis and averaging block 98 will output the mixed signal 58.

In fig. 6, the first, second and third signal analysis and averaging

blocks

90, 92, 98 are provided in more detail. Each of the signal analysis and averaging blocks includes a signal analysis block, a signal mapping block, and a signal averaging block. Each of the signal analysis and averaging blocks may mirror the signal processing block 12 of fig. 1A, 1B, and 2.

Specifically, the first signal analysis and averaging block 90 includes a first signal analysis block 140 that receives the first channel 80 and the second channel 82. As described above, the first channel 80 is the highest gain channel and the second channel 82 is a medium high gain signal. The first signal analysis block 140 outputs a first set of mapping parameters 146. The first signal mapping block 144 receives the second channel 82 and a first set of mapping parameters 146. The first signal mapping block 144 outputs a first mixed signal 148. The first signal averaging block 142 receives the first channel 80 and the mixed signal 148 and outputs the first high gain intermediate signal 94. As described above, the first signal averaging block 142 will output a weighted average of the first channel 80 and the mixed signal 148. As one example, the signal averaging block 142 will output the first channel 80 unless the first channel is saturated. If the first channel is saturated, the first signal averaging block 142 will output a mixed signal.

The second signal analysis and averaging block 92 includes a second signal analysis block 150 that receives the third channel 84 and the fourth channel 86. As described above, the third channel 84 is a medium-low gain channel, and the fourth channel 86 is the lowest gain signal. The second signal analysis block 150 outputs a second set of mapping parameters 152. A second signal mapping block 154 receives the fourth channel 86 and the second set of mapping parameters 152. The second signal mapping block 154 outputs a second mixed signal 156. The second signal averaging block 158 receives the third channel 84 and the second mixed signal 156 and outputs a second low-gain intermediate signal 96. As described above, the second signal averaging block 158 will output a weighted average of the third channel 84 and the second mixed signal 156. As one example, the second signal averaging block 158 will output the third channel 84, unless the third channel is saturated, and if the third channel is saturated, the second signal averaging block 158 will output the second mixed signal 156.

The third signal analysis and averaging block 98 includes a third signal analysis block 160 that receives the first intermediate signal 94 and the second intermediate signal 96. The third signal analysis block 160 outputs a third set of mapping parameters 162. The third signal mapping block 164 receives the second intermediate signal 96 and the third set of mapping parameters 162. The third signal mapping block 164 outputs a third mixed signal 166. The third signal averaging block 168 receives the first intermediate signal 94 and the third mixed signal 166. The third signal averaging block 168 will output a weighted average of the first intermediate signal 94 and the third mixed signal 166. As one example, the third signal averaging block 168 will output the first intermediate high gain signal 94 unless the first intermediate high gain signal 94 is saturated. If the first intermediate high-gain signal 94 is saturated, the third signal averaging block 168 will output the third mixed signal 156.

There are situations where both the highest gain signal and the high gain signal (first and second channels) may saturate, so the system will output a third intermediate signal, which is derived from the low gain and lowest gain signals. This significantly increases the dynamic range available in such systems while providing a method for generating a smoothed output signal.

The processing arrangements of fig. 5 and 6 are parallel processing of the first, second, third and fourth channels. Fig. 7 is an alternative embodiment of a processing stage having multiple input channels. Fig. 7 is a sequential processing stage 170 configured to process a first lane 80, a second lane 82, a third lane 84, and a fourth lane 86 in sequence.

The sequential processing stage 170 includes a first signal analysis and averaging block 172 that receives the fourth channel 86 and the third channel 84. The fourth channel 86 is the channel with the lowest amplification factor or sensitivity and the third channel 84 is the channel with the medium to low amplification factor or sensitivity. As described with respect to fig. 5 and 6, the first signal analysis and averaging block 172 is configured to generate mapping parameters based on the third and fourth channels, and is configured to generate a mixed signal from the mapping parameters and the fourth channel. The first signal analysis block outputs a first intermediate signal 174 which is a weighted average of the third channel 84 and the mixed signal.

The sequential processing stage 170 comprises a second signal analysis and averaging block 176 receiving the first intermediate signal 174 and the second channel 82, which is a medium to high gain signal. As described with respect to fig. 5 and 6, the second signal analysis and averaging block 176 is configured to generate the mapping parameters based on the first intermediate signal 174 and the second channel. The second signal analysis and averaging block 176 is configured to generate a mixed signal from the mapping parameters and the second channel 82. The second signal analysis block 176 outputs a second intermediate signal 178 which is a weighted average of the second channel 84 and the mixed signal.

The sequential processing stage 170 includes a third signal analysis and averaging block 180 that receives the first channel 80 and the second intermediate signal 178. As described with respect to fig. 5 and 6, the third signal analysis and averaging block 176 is configured to generate the mapping parameters based on the second intermediate signal 178 and the first channel 80. The third signal analysis and averaging block 180 is configured to generate a mixed signal from the mapping parameters and the second intermediate signal 178. The third signal analysis block 178 outputs the first channel 80, or if the first channel is saturated, the mixed signal.

The sequential processing stage 170 may take longer to process than the parallel processing stages of fig. 5 and 6, for example due to computational delays. One benefit of the sequential processing stage 170 is that the first, second and third signal analysis and averaging blocks may be implemented in a single module. The output of the first processing for the third and fourth channels may be stored in memory and provided back to the same module to perform the next analysis. The sequential processing stage 170 may be implemented in software. The parallel processing stages of fig. 5 and 6 may also be implemented in software, however, if implemented in hardware, the parallel processing stages may operate faster.

The various embodiments described above can be combined to provide further embodiments. All of the U.S. patents, U.S. patent application publications, U.S. patent applications, foreign patents, foreign patent applications and non-patent publications (including but not limited to U.S. provisional patent application No.61/972,194) cited in this specification and/or listed in the application data sheet are incorporated herein by reference, in their entirety. Aspects of the embodiments can be modified, if necessary, to employ concepts of the various patents, applications and publications to provide yet further embodiments.

These and other changes can be made to the embodiments in light of the above detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.

Claims

1. A method for operating a multi-channel transducer device, comprising:

receiving a first signal from a first acquisition channel having a first sensitivity;

receiving a second signal from a second acquisition channel having a second sensitivity different from the first sensitivity;

generating a mixed signal by mapping the second signal to the first signal;

outputting the first signal when the first signal is below a first threshold and above a second threshold; and

outputting the mixed signal when the first signal is above the first threshold or when the first signal is below the second threshold;

wherein generating the mixed signal comprises:

detecting a plurality of mapping parameters from the first signal and the second signal; and

forming the mixed signal by modifying the second signal with the mapping parameters,

wherein detecting the plurality of mapping parameters comprises selecting a first plurality of calibration samples of the first signal and a second plurality of calibration samples of the second signal, the first plurality of calibration samples and the second plurality of calibration samples corresponding to values of the first signal and values of the second signal, respectively, when the first signal and the second signal are simultaneously in an overlapping resolution region.

2. The method of claim 1, wherein detecting the plurality of mapping parameters further comprises performing a least squares optimization with respect to the first and second plurality of calibration samples, the least squares optimization comprising updating a square matrix comprising at least a first cell that holds a first accumulator value equal to a sum of squares of the first plurality of calibration samples.

3. The method of claim 2, wherein detecting the plurality of mapping parameters comprises obtaining a first matrix comprising a plurality of samples of the first signal; obtaining a second matrix comprising a plurality of samples of the second signal; multiplying a transpose of a first matrix by the first matrix to obtain a multiplication matrix; an inverse matrix is determined from the transpose matrix, and the inverse matrix is multiplied by the transpose matrix and the second matrix.

4. The method of claim 1, further comprising:

receiving a third signal from a third acquisition channel;

receiving a fourth signal from a fourth acquisition channel; and

generating the mixed signal by mapping the first signal, the second signal, the third signal, and the fourth signal.

5. The method of claim 4, wherein generating the mixed signal comprises:

forming a first intermediate signal by mapping the second signal to the first signal;

forming a second intermediate signal by mapping the fourth signal to the third signal; and

forming the mixed signal by mapping the second intermediate signal to the first intermediate signal.

6. The method of claim 4, wherein generating the mixed signal comprises:

forming a first intermediate signal by mapping the fourth signal to the third signal;

forming a second intermediate signal by mapping the first intermediate signal to the second signal; and

forming the mixed signal by mapping the second intermediate signal to the first signal.

7. The method of claim 1, wherein receiving the first signal and receiving the second signal comprises:

receiving the first signal from a first analog-to-digital converter; and

receiving the second signal from a second analog-to-digital converter,

the method further includes determining the first threshold and the second threshold by analyzing a second plurality of quantization levels of the second analog-to-digital converter.

8. The method of claim 7, wherein the first signal is a high gain signal and the second signal is a low gain signal,

the method further comprises the following steps:

determining a third threshold and a fourth threshold for the low gain signal by analyzing a first plurality of quantization levels of the first analog-to-digital converter; and

determining the first threshold and the second threshold by analyzing a second plurality of quantization levels of the second analog-to-digital converter.

9. The method of claim 8, further comprising:

determining a high resolution zone from the first threshold and the second threshold;

determining a low resolution region from the third threshold and the fourth threshold; and

determining an overlapping area of the high resolution area and the low resolution area,

the method further includes identifying the plurality of calibration samples using the overlap region.

10. A multi-channel transducer device comprising:

a second acquisition module providing a second signal;

a first acquisition module providing a first signal; and

a signal processing stage configured to:

determining a plurality of mapping parameters describing a linear relationship between the second signal and the first signal;

forming a mixed signal based at least in part on the second signal and the plurality of mapping parameters, the mixed signal representing the second signal mapped onto the first signal; and

providing an output signal, the output signal being a weighted average of the first signal and the mixed signal,

wherein to determine the plurality of mapping parameters, the signal processing stage is configured to select a first plurality of calibration samples of the second signal and a second plurality of calibration samples of the first signal, the first and second plurality of calibration samples corresponding to values of the second signal and the first signal, respectively, when the second signal and the first signal are simultaneously in an overlapping resolution region.

11. The apparatus of claim 10, wherein to determine the plurality of mapping parameters, the signal processing stage is further configured to perform a least squares optimization with respect to the first and second plurality of calibration samples, the least squares optimization comprising updating a square matrix comprising at least a first cell that holds a first accumulator value equal to a sum of squares of the first plurality of calibration samples.

12. The apparatus of claim 11, wherein to detect the plurality of mapping parameters, the signal processing stage is configured to obtain a second matrix comprising a plurality of samples of the second signal; obtaining a first matrix comprising a plurality of samples of the first signal; multiplying the transposed matrix of the second matrix by the second matrix to obtain a multiplication matrix; an inverse matrix is determined from the transpose matrix, and the inverse matrix is multiplied by the transpose matrix and the first matrix.

13. The apparatus of claim 10, wherein the signal processing stage is configured to determine the plurality of mapping parameters on a per sample basis and form the mixed signal.

14. The apparatus of claim 10, wherein to provide the output signal, the signal processing stage is configured to:

selecting a first signal weight for the first signal and a second signal weight for the mixed signal; and

determining the weighted average of the first signal and the mixed signal based at least in part on the first signal weight and the second signal weight.

15. The apparatus of claim 14, wherein the first signal is a high-gain signal and the second signal is a low-gain signal, and to select the first and second signal weights, the signal processing stage is configured to compare the high-gain signal to first and second thresholds representing limits of a saturation signal range associated with the high-gain signal.

16. The apparatus of claim 15, wherein the signal processing stage is further configured to re-determine the first threshold and the second threshold on a per sample basis.

17. The apparatus of claim 15, wherein the signal processing stage is configured to:

selecting 1 as the first signal weight and 0 as the second signal weight when the high gain signal is between the first threshold and the second threshold; and

when the high gain signal is not between the first threshold and the second threshold, 0 is selected as the first signal weight and 1 is selected as the second signal weight.

18. The apparatus of claim 15, wherein:

to select the first signal weight and the second signal weight, the signal processing stage is further configured to compare the low-gain signal to a third threshold and a fourth threshold, the third threshold and the fourth threshold representing a limit of a flat signal range associated with the low-gain signal,

the signal processing stage is configured to select a non-zero value for each of the first and second signal weights when the high-gain signal is between the first and second thresholds and the low-gain signal is not between the third and fourth thresholds.

19. The apparatus of any of claims 10-18, further comprising:

a first sensor having a first sensitivity;

a second sensor having a second sensitivity;

a first analog-to-digital converter coupled with the first sensor; and

a second analog-to-digital converter coupled with the second sensor;

the signal processing stage coupled with the first analog-to-digital converter and the second analog-to-digital converter, and the signal processing stage comprising:

a first signal analysis block coupled with the first analog-to-digital converter and the second analog-to-digital converter;

a first signal mapping block coupled to the second analog-to-digital converter and the first signal analysis block; and

a first signal averaging block coupled with the first analog-to-digital converter and the first signal mapping block.

20. The apparatus of claim 19, further comprising:

a third sensor;

a fourth sensor;

a third analog-to-digital converter; and

and a fourth analog-to-digital converter.

21. The apparatus of claim 20, wherein the signal processing stage comprises:

a second signal analysis block coupled with the third analog-to-digital converter and the fourth analog-to-digital converter;

a second signal mapping block coupled to the fourth analog-to-digital converter and the second signal analysis block; and

a second signal averaging block coupled with the third analog-to-digital converter and the second signal mapping block.

22. The apparatus of claim 21, wherein the signal processing stage comprises:

a third signal analysis block coupled to the first signal averaging block and the second signal averaging block;

a third signal mapping block coupled to the second signal averaging block and the third signal analysis block; and

a third signal averaging block coupled with the first signal averaging block and the third signal mapping block.

23. An electronic device, comprising:

a sequential signal processing circuit comprising:

a first input terminal configured to receive a first signal having a first gain;

a second input terminal configured to receive a second signal having a second gain different from the first gain;

a first signal analysis block coupled to the first input terminal and the second input terminal;

a third input terminal configured to receive a third signal having a third gain different from the second gain, wherein the third gain is greater than the second gain, and the second gain is greater than the first gain; and

a second signal analysis block coupled to the third input terminal and an output of the first signal analysis block.

24. The apparatus of claim 23, further comprising:

a fourth input terminal;

a third signal analysis block coupled to the fourth input terminal and an output of the second signal analysis block.

25. The apparatus of claim 23, wherein the first signal analysis block is configured to generate a first mapping parameter based on a signal from the first input terminal and a signal from the second input terminal, and to generate a first mixed signal from the first mapping parameter.

26. The apparatus of claim 25, wherein the second signal analysis block is configured to generate a second mapping parameter based on a signal from the third input terminal and the output of the first signal analysis block, and to generate a second mixed signal from the second mapping.

27. The apparatus of claim 26, wherein the second signal analysis block is configured to generate the second mapping parameter at least by performing a least squares optimization on the third signal and the output of the first signal analysis block.

28. The apparatus of claim 25, wherein the first signal analysis block is configured to generate the first mapping parameter at least by performing a least squares optimization on the first signal and the second signal.

29. The apparatus of claim 28, wherein the first signal analysis block is configured to generate the first mapping parameter by at least:

selecting a first plurality of calibration samples of the first signal, the first plurality of calibration samples corresponding to values of the first signal, respectively, when the first signal and the second signal are simultaneously in an overlapping resolution region;

selecting a second plurality of calibration samples of the second signal, the second plurality of calibration samples corresponding to values of the second signal, respectively, when the first signal and the second signal are simultaneously in the overlapping resolution region; and

performing the least squares optimization on the first plurality of calibration samples and the second plurality of calibration samples.

30. The apparatus of claim 29, wherein the first signal analysis block is configured to perform the least squares optimization on the first and second plurality of calibration samples by at least:

updating a square matrix comprising at least a first cell that holds a first accumulator value equal to a sum of squares of the first plurality of calibration samples.

31. An electronic device, comprising:

a first sensor;

a second sensor;

a signal processing stage coupled to the first sensor and the second sensor, the signal processing stage comprising:

a first signal analysis block coupled to the first sensor and the second sensor;

a first signal mapping block coupled to the second sensor and the first signal analysis block; and

a first signal averaging block coupled to the first sensor and the first signal mapping block.

32. The apparatus of claim 31, further comprising:

a third sensor;

a fourth sensor; and

the signal processing stage comprises:

a second signal analysis block coupled to the third sensor and the fourth sensor;

a second signal mapping block coupled to the fourth sensor and the second signal analysis block; and

a second signal averaging block coupled to the third sensor and the second signal mapping block.

33. The apparatus of claim 32, wherein the signal processing stage comprises:

a third signal averaging block coupled to the first signal averaging block and the third signal mapping block.

34. A method for operating a multi-channel transducer device, comprising:

receiving a first signal having a first gain at a first input terminal;

receiving a second signal having a second gain different from the first gain at a second input terminal;

generating, by a first signal analysis block coupled to the first input terminal and the second input terminal, a first mapping parameter based on the first signal and the second signal;

generating, by the first signal analysis block, a first mixed signal using the first mapping parameter;

receiving a third signal having a third gain different from the second gain at a third input terminal, wherein the third gain is greater than the second gain and the second gain is greater than the first gain;

generating a second mapping parameter by a second signal analysis block coupled to the third input terminal and an output of the first signal analysis block; and

generating, by the second signal analysis block, a second mixed signal using the second mapping parameter.

35. The method of claim 34, comprising:

generating, by the second signal analysis block, the second mapping parameter based on the third signal and the first output signal of the first signal analysis block.

36. The method of claim 34, generating the first mapping parameter comprises:

performing a least squares optimization on the first signal and the second signal.

37. The method of claim 36, wherein performing the least squares optimization comprises:

38. The method of claim 37, wherein performing the least squares optimization on the first and second plurality of calibration samples comprises at least: updating a square matrix comprising at least a first cell that holds a first accumulator value equal to a sum of squares of the first plurality of calibration samples.

39. A method for operating a multi-channel transducer device, comprising:

outputting, by a first sensor, a second sensor, and a third sensor, a first signal having a first gain, a second signal having a second gain, and a third signal having a third gain, respectively, the first gain, the second gain, and the third gain being different, and the third gain being greater than the second gain, and the second gain being greater than the first gain;

receiving the first signal at a first input terminal coupled to an output of the first sensor;

receiving the second signal at a second input terminal coupled to an output of the second sensor;

generating, by a first signal analysis block coupled to the first input terminal and a second input terminal, a first mapping parameter based on the first signal and the second signal;

receiving a third signal at a third input terminal coupled to an output of the third sensor;

40. The method of claim 39, comprising: