DE102015221375A1 - Semiconductor component and method for producing a semiconductor device and control device for a vehicle - Google Patents

Abstract

A semiconductor device (10) is described, which has a plurality of trenches and regions of a conductive material (16, 20) arranged in these trenches. The conductive material (16) is used as a gate electrode in the manner of a trench MOSFET. A portion of the conductor tracks otherwise used as gate electrodes are electrically separated and used as a gate resistor (20). Furthermore, a method for producing such a semiconductor device (10) and a control device for a vehicle are proposed.

Description

The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device and a control device for a vehicle.

State of the art

Modern semiconductor switches, for example MOSFETs (Metal Oxide Semiconductor Field Effect Transistor, or Metal Oxide Semiconductor Field Effect Transistor) or PowerMOSFETs, are designed for very low gate drain capacitances, since this promotes a feedback of the drain voltage to the gate. This gate-drain capacitance, also referred to as Miller capacitance, during the switching operation leads to a phase in which the gate voltage remains constant, the so-called Miller plateau. This effect slows down the switching process, which is why it tries to eliminate the Miller capacity as far as possible, that is, to reduce it as much as possible.

In order to influence the switching speed of a MOSFET, it is also known to provide a gate resistor in the wiring. A larger gate resistor leads to a larger time extension of the Miller plateau and thus to a slower switching process. The gate resistor is usually designed as a single element separate from the MOSFET and installed, for example, on the circuit board, resulting in an increased production cost.

In addition, unavoidable variability in the production process can lead to a change in Miller capacity. This especially occurs with changes in the geometry of the gate electrode, which have direct effects on the volume of the electrode. As a result, variations in the switching behavior of otherwise identical components may occur, which is undesirable.

Furthermore, various ways are known to produce and use resistors on the semiconductor chip. That's how it describes US 2011/0318897 A1 a STI process ("shallow trench isolation"), in which the trench, ie the trench, is filled with polysilicon and covered with an insulating material. The polysilicon track serves as a resistor. The resistor thus produced can be used as a precision resistor in integrated circuits.

The US 2010/0327348 A1 Describes how to influence the size of resistors in PowerMOSFETs to improve the electronic properties of the device.

In the JP 2006/319241 A is a method for the isolation of integrated by diffusion in the semiconductor substrate resistors described by means of trenches or trenches.

Disclosure of the invention

According to the invention, a semiconductor component is provided, comprising a substrate which has a plurality of trenches electrically isolated from active regions of the semiconductor component, wherein in at least one first trench along a longitudinal axis of the trench a first portion of an electrically conductive material is introduced which is connected to a first electrical trench Contact is connected such that the first portion acts upon application of a voltage to the first electrical contact as a gate electrode of a MOS structure, and wherein in the first trench and / or in a second trench along the longitudinal axis of the trench, a second portion of the electrically conductive Material is introduced. The semiconductor device according to the invention is characterized in that a first end of the second portion is electrically connected to the first electrical contact and a second end of the second portion is electrically connected to the first portion of the conductive material. Preferably, the second portion is electrically connected as a series resistor for the first portion and thus as a gate resistor. Such a semiconductor component is particularly suitable for the realization of a control device for a vehicle.

• a. Bereitstellen eines Halbleitersubstrats
• b. Erstellen einer Mehrzahl von Gräben in dem Halbleitersubstrat
• c. Herstellen einer ersten isolierenden Schicht auf einer durch die Gräben strukturierten Substratoberfläche
• d. Füllen der Gräben mit leitendem Material so, dass in den Gräben jeweils zumindest ein elektrisch leitfähiger oberer Abschnitt entsteht
• e. Herstellen einer zweiten isolierenden Schicht über dem oberen Abschnitt
• f. elektrisches Kontaktieren des oberen Abschnitts zumindest eines ersten Grabens derart, dass dieser als Gate einer MOS-Struktur fungieren kann und
• g. elektrisches Kontaktieren des oberen Abschnitts zumindest eines zweiten Grabens derart, dass er als Vorwiderstand für das Gate der MOS-Struktur fungieren kann.

The method according to the invention for producing a semiconductor component basically comprises the following steps:

• a. Providing a semiconductor substrate
• b. Creating a plurality of trenches in the semiconductor substrate
• c. Producing a first insulating layer on a substrate surface structured by the trenches
• d. Filling the trenches with conductive material so that in each case at least one electrically conductive upper section is formed in the trenches
• e. Producing a second insulating layer over the upper portion
• f. electrically contacting the upper portion of at least one first trench such that it may act as the gate of a MOS structure, and
• G. electrically contacting the upper portion of at least one second trench so that it can function as a series resistor for the gate of the MOS structure.

Advantages of the invention

The semiconductor device according to the invention has the advantage that the gate resistor and the Miller capacity are technologically coupled. It can be used in particular as a power semiconductor, for example as a power MOSFET or power MOSFET.

The gate resistor is monolithically integrated into the semiconductor substrate and automatically compensates for changes in the Miller capacitance. As a result of process variations, irregularities in the size of the Miller capacitance of a MOSFET have no or only a reduced effect on the temporal switching behavior, since a process-related change in the Miller capacitance simultaneously leads to a change in the gate bias resistance and the two changes are opposite to the one Operating time, so that they compensate at least partially. The time constant τ = RC remains largely unchanged. It can thus be achieved symmetrization of the switching behavior and a reduction of the dispersion of the switching times. Similarly, a tendency to oscillate is avoided by a feedback via C _gd . If several semiconductor components according to the invention are connected in parallel in the form of MOSFETs, a symmetrical switching behavior is achieved independently of process variations. An external compensation circuit, for example based on an R or RC element, can be saved.

The placement of the gate bias in close proximity to the gate reduces parasitic capacitances and improves switching performance. The self-compensation effect further achieves a more uniform current consumption of several parallel-connected PowerMOSFETs compared to conventional MOSFETs with external gate resistance, which is therefore unaffected by the manufacturing process, but process-dependent variable Miller capacitance. In addition, the previously required external gate resistor can now be saved, which brings a cost advantage.

The first insulating layer is preferably an oxide layer. This does not necessarily have to be deposited as an additional layer, but can be formed for example by thermal oxidation of the existing substrate material.

The first portion of the conductive material preferably acts as a gate electrode, whereas the second portion of the conductive material can be used as a gate resistor. The trenches, in which the first and second sections of the conductive material are arranged, preferably have walls extending at least substantially perpendicular to the substrate surface and a bottom extending substantially parallel to the substrate surface. The trenches can then be made particularly easy. One way to make the trenches is to use a recess technique. The conductive material is preferably a highly doped polycrystalline silicon, for example a highly doped, degenerate polycrystalline silicon.

The portions of the conductive material preferably have a substantially rectangular cross-section, which is advantageously invariable along the trench longitudinal axis. The printed conductors can then be produced simply by homogeneously depositing conductive material.

The first electrical contact is preferably contactable from outside the semiconductor device, for example by a metallization. The semiconductor device can then be connected from the outside and integrated into circuits. As a rule, the first section of the conductive material and the second section of the conductive material are arranged in different trenches. In this case, the respective trenches are initially produced identically and obtain their different function only by the external wiring. It is also possible in a later explained embodiment, however, that both the first and the second section are arranged in a common trench. In this case, of course, the two sections must be electrically isolated from each other.

In particular, as usual, the region of the semiconductor material in which pn junctions are present and in which the charge carrier concentrations can change during operation is regarded as the active region. In particular, the active region is provided with dopants.

It is also advantageously possible for the first section and the second section to have an identical cross section within the scope of the process accuracy. An improvement in the quality of the self-compensation is then obtained. Although a certain degree of self-compensation also takes place qualitatively with different cross-sections, an approximation of the cross-sections makes it possible to compensate for the change in the Miller capacitance as exactly as possible by changing the gate bias resistance. A cross-section is understood to mean the shape of a surface which is obtained as a section through a plane perpendicular to the trench longitudinal axis. Two cross-sections can be regarded as identical, in particular, if the two elements to be compared have been produced by means of identical processes, that is to say actually identical in nominal terms. Differences between the cross sections then result only from process fluctuations.

In a particular embodiment, it is provided that the second portion consists of a plurality of electrically connected in series sections and extends over a plurality of trenches, so that in a favorable way, a way to adjust the length of the resistance path and thus the size of the Resistance is achieved. Two sections are then connected together via an external electrically conductive connection. For example, several adjacent trenches can be used and connected to one another in meandering fashion. Likewise, it is conceivable that a plurality of sections of the second section are arranged one above the other within a trench. These sections, for example, can be connected together meandering. It can then be generated within a trench, a resistance track which is longer than the trench altogether, so that the resistance value of the manufactured resistor can be set flexibly. However, in this case, the individual sections in turn must be isolated from each other, which means a higher production cost.

Alternatively, it is advantageously provided that the semiconductor component has a second electrical contact formed on the surface, wherein at least a second portion is arranged between the second electrical contact and the substrate. The second contact can be formed flat and used for example as a source electrode. Trenches located directly below the source electrode are usually not used for active areas of the MOSFET. The use of these trenches for the gate resistor thus allows better utilization of the surface of the semiconductor device or an integration of the invention, without having to spend more resources. It is thus avoided by the use of located at the edge or under the source electrode trenches for the gate resistance yield losses, as they might occur in the use of otherwise otherwise used trenches. Instead of the source electrode, the drain electrode can also be used to arrange the trenches used as the gate resistor below.

It is advantageous if the regions of the active semiconductor region adjoining the second trench have no dopants, in particular no implanted electron donors or acceptors. If the second section of the conductive material is arranged in the second trench, then this trench and the adjacent regions of the substrate are used purely passively, so that no doping is necessary. The manufacturing process can be done more economically.

An embodiment of the invention provides that the first portion and the second portion are arranged in a common trench and electrically insulated from each other. Both the gate resistor and the gate electrode can then be arranged to save space in one and the same trench. In particular, the corresponding structuring can take place in trench longitudinal direction, so that the trench is divided into a first longitudinal section in which the first section of the conductive material is arranged and into a second longitudinal section in which the second section of the conductive material is arranged. Between the two sections, a layer of an electrically insulating material preferably covering the entire cross section of the trench must then be present.

A development of the invention provides that at least one of the trenches is filled up to a first height h ₁ with a first conductive material and the first section and / or the second section is between the first height h ₁ and a second height h ₂ , which is located above the first height h ₁ extend. The lower region up to the height h ₁ can then be connected as a field plate, whereas the upper region between the height h ₁ and the height h _{2 is used} as a gate electrode and / or as a gate resistor. In the semiconductor device according to the invention can thus be integrated in a simple manner, a field plate.

• h. Füllen der Gräben mit leitendem Material, so dass ein unterer leitfähiger Abschnitt entsteht
• i. Entfernen eines Teils des leitenden Materials des unteren leitenden Abschnitts bis zu einer Höhe h₁ mittels eines Ätzprozesses
• j. Herstellen einer isolierenden Trennschicht zwischen dem unteren leitenden Bereich und dem oberen leitenden Abschnitts.

According to a preferred embodiment of the method according to the invention, it is provided that the following steps are carried out after step c) and before step d):

• H. Fill the trenches with conductive material to form a lower conductive section
• i. Removing a portion of the conductive material of the lower conductive portion up to a height h ₁ by means of an etching process
• j. Forming an insulating separation layer between the lower conductive region and the upper conductive region.

As already mentioned above, the lower conductive section can then be used as a field plate.

Advantageous developments of the invention are specified in the subclaims and described in the description.

drawings

Embodiments of the invention will be explained in more detail with reference to the drawings and the description below. Show it:

1 a cross section of a first embodiment of a semiconductor device according to the invention,

2 a cross section through a second embodiment of a semiconductor device according to the invention,

3 an equivalent circuit diagram of a MOSFET

4 a cross section of an intermediate step for the production of the semiconductor device according to the invention

5 a diagram for the distribution of the characteristic R _gs over a wafer,

6 a diagram for the distribution of the characteristic C _gd over a wafer; and

7 a diagram for the correlation between R _gs and C _gd for individual points on a wafer.

Embodiments of the invention

In the 1 is a first embodiment of a semiconductor device according to the invention 10 shown in cross section. The substrate can be seen 12 in which as vertical structures the trenches 14.1 . 14.2 and 14.3 available. The trenches 14.1 . 14.2 and 14.3 are filled to a height h ₁ with a conductive material, which by a corresponding contact, for example, by a short circuit with a source electrode, not shown, as a field plate 28 can be used. The conductive material may be, for example, a polysilicon and then forms a lower polysilicon track. Between the height h ₁ and the height h ₂ is also a conductive material 16 . 20 , For example, again a polysilicon. In this way, an upper polysilicon track is formed. Both the upper and lower polysilicon paths preferably extend over the entire length of the trenches 14 , At the end of the trenches seen in trench longitudinal direction are not shown electrical contacts, with the help of the polysilicon tracks according to their function as a gate electrode 16 or as resistance track 20 can be connected.

The conductive material 16 . 20 can both as a gate electrode 16 as well as gate resistor 20 be used. The gate electrode 16 thus corresponds to the above-mentioned first section, and the gate resistor 20 corresponds to the above-mentioned second section. In 1 is an embodiment with a total of three trenches 14.1 . 14.2 and 14.3 shown. In the trenches 14.2 and 14.3 For example, the upper polysilicon tracks are used as gate electrodes 16 used, whereas in the right ditch 14.1 the upper polysilicon track as a gate resistor 20 is being used. Any other number of trenches 14 as well as every conceivable combination of uses of the polysilicon webs 16 . 20 are also possible.

Between the walls of the trenches 14 and the polysilicon tracks 16 . 20 In any case, there is a thin layer of electrically insulating material 22 , For example, an oxide, in particular a silicon oxide. In the same way, the two polysilicon tracks 16 . 20 by means of a thin layer of electrically insulating material 24 electrically isolated from each other. The ones in the trenches 14 arranged polysilicon tracks 16 . 20 are thus completely electrically from those in the substrate 12 arranged active regions of the semiconductor device 10 isolated. Thus, no current flows between the polysilicon tracks 16 . 20 and the active regions of the semiconductor device 10 ,

2 shows a cross section of a second embodiment of a semiconductor device according to the invention 10 , which is designed as a MOSFET. Shown again are the substrate 12 , the ditch 14 , the lower polysilicon track used as a field plate 28 , the upper polysilicon track connected here as gate electrode 16 and the insulating material 30 , Also visible are the lower metallization 32 , the starting point for contacting through the drain contact 34 is, as well as the upper metallization 36 , the starting point for contacting through the source contact 38 is. Shown is also schematically the gate contact 18 ,

Also symbolically indicated are the various capacitances that exist between the individual elements of the semiconductor component, in particular between the terminals for source, drain and gate, and influence the behavior of the MOSFET. The source area 40 is with the field plate 28 short-circuited by an electrical connection, not shown, so that the capacitances C _gs and C _ds each receive two parallel switching symbols, of which in each case one for the proportion of the respective capacitance connected to the source region 40 is formed and one for the proportion of capacity with the field plate 28 is formed, stands. By contrast, the capacitance C _gd drawn diagonally in the figure between the gate electrode is particularly important for the invention 16 and from the drain contact 34 outgoing trace as this represents the Miller Capacity already discussed above.

For clarification is in 3 an equivalent circuit diagram is shown, in which the relationships of the individual capacitances and the gate bias resistor R _{g become} clearer. The gate resistor R _g is in 2 however, not shown. He is from one or more upper polysilicon tracks arranged in other trenches 16 educated.

Based on 4 should now be combined with 3 the principle of self-compensation can be clarified. 4 shows a cross section of an intermediate step for the production of the semiconductor device according to the invention 10 , There were already the trenches 14.1 . 14.2 in the substrate 12 made and with an oxide layer 42 Mistake. Subsequently, the trenches 14.1 . 14.2 filled with polysilicon. polysilicon 28 became common with the oxide layer 42 then removed up to the height h ₁ , for example by an etching process. The exact value of the height h ₁ is dependent on process parameters that can not be precisely controlled so that the value of the height h ₁ is subject to a certain scatter.

In a further process step, the trench is now again after renewed generation of a thin oxide layer 14 filled with polysilicon, so that an upper polysilicon track is formed. The volume of this polysilicon track is directly related to the height h ₁ : If the height h _{1 has} a greater value, this is that of the upper polysilicon track 16 occupied volume and thus the mass of the polysilicon track 16 smaller than when the height h _{1 has} a smaller value, since the height h _{2 is} fixed and only from the upper limit of the trench 14 depends. A smaller mass causes a smaller capacitance C _gd between the polysilicon track used as gate electrode and the source area of the semiconductor component used as MOSFET 10 , Will the upper polysilicon track 16 however, used as gate resistor R _g , it results from the smaller mass of the polysilicon track 16 a smaller cross section of the resistor and thus a larger resistance value. The smaller capacitance C _gd affects an accelerating effect on the switching time of the semiconductor device 10 whereas the larger resistance for R _gd results in a slower switching time. The two effects thus cancel out at least partially, resulting in a homogenization of the switching behavior of various components 10 despite still existing process fluctuations.

5 shows the distribution of resistance _values for R _gs as a function of the position of the individual component on a wafer investigated as an example. As usual, a large number of identical components were produced on a common wafer. Subsequently, for the individual elements R _{ds was} determined and plotted against the y-coordinate of the position of the device on the wafer.

Analog is in 6 the value of C _gd for the individual components is plotted against the y-coordinate on the wafer. Both diagrams show that relatively large deviations from the mean value are present at the edge area of the wafer, while in the middle area of the wafer the values for R _gs and C _gd are relatively constant in each case. The resistance values R _gs decrease toward the edge of the wafer, whereas the values for the capacitance C _gd increase, suggesting a larger volume of the polysilicon lines generated in the edge region.

In 7 are now the two values from the 5 and 6 set in relation to each other. Each examined individual component was drawn into the diagram on the basis of the determined values for R _gs and C _gd . For 7 two different wafers were investigated, both of which show basically the same behavior: the values for R _gs and C _gd are strongly correlated. A smaller value for R _gs causes a larger value for C _gd and vice versa. Due to the opposite effects of variations in these two characteristics, self-compensation occurs so that the resulting MOSFETs exhibit less variation in their switching performance than conventional MOSFETs.

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• US 2011/0318897 A1 [0005]
• US 2010/0327348 A1 [0006]
• JP 2006/319241 A [0007]

Claims (12)

Semiconductor device ( 10 ) with a substrate ( 12 ), which electrically connects a plurality of active regions of the semiconductor device ( 10 ) isolated trenches ( 14.1 . 14.2 . 14.3 ), wherein in at least one first trench ( 14.1 ) along a longitudinal axis of the trench (L) a first section ( 16 ) of an electrically conductive material which is connected to a first electrical contact ( 18 ) is connected in such a way that upon application of a voltage to the first electrical contact ( 18 ) acts as a gate electrode of a MOS structure, and wherein in the first trench ( 14.1 ) and / or in a second trench ( 14.2 ) along the longitudinal axis of the trench a second section ( 20 ) of the electrically conductive material, characterized in that the second section ( 20 ) electrically as a series resistor for the first section ( 16 ), that a first end of the second section ( 20 ) electrically connected to the first electrical contact ( 18 ) and a second end of the second section ( 20 ) electrically with the first section ( 16 ) of the conductive material. Semiconductor device ( 10 ) according to claim 1, wherein the first section ( 16 ) and the second section ( 20 ) have a substantially identical cross-section. Semiconductor device ( 10 ) according to claim 1 or 2, wherein the second section ( 20 ) consists of a plurality of electrically connected in series sections and a plurality of trenches ( 14 ). Semiconductor device ( 10 ) according to one of the preceding claims, wherein the semiconductor component ( 10 ) has a second electrical contact formed on the surface ( 38 ), and wherein at least a second section ( 20 ) between the second electrical contact ( 38 ) and the substrate ( 12 ) is arranged. Semiconductor device ( 10 ) according to any one of the preceding claims, wherein at the second trench ( 14 ) adjacent regions of the active semiconductor region have no dopants. Semiconductor device ( 10 ) according to any one of the preceding claims, wherein the first section ( 16 ) and the second section ( 20 ) in a common trench ( 14 ) are arranged and electrically isolated from each other. Semiconductor device ( 10 ) according to any one of the preceding claims, wherein the first section ( 16 ) and the second section ( 20 ) each consist of polysilicon. Semiconductor device ( 10 ) according to one of the preceding claims, wherein at least one of the trenches is filled up to a first height h ₁ with a first conductive material and the first section (FIG. 16 ) and / or the second section ( 20 ) between the first height h ₁ and a second height h ₂ located above the first height h ₁ extend. Semiconductor device ( 10 ) according to any one of the preceding claims, wherein in at least one of the trenches ( 14 ) below the first section ( 16 ) is a lower portion of an electrically conductive material which is used as a field plate ( 28 ) acts. Method for producing a semiconductor component ( 10 ) with the steps: a. Providing a semiconductor substrate ( 12 b. Creating a plurality of trenches ( 14 ) in the semiconductor substrate ( 12 c. Producing a first insulating layer ( 22 ) on one through the trenches ( 14 ) structured substrate surface d. Filling the trenches ( 14 ) with conductive material so that in the trenches in each case at least one electrically conductive upper section ( 16 . 20 ) arises e. Producing a second insulating layer ( 30 ) above the upper section ( 16 . 20 f. electrically contacting the upper section ( 16 ) at least one first trench ( 14 ) such that it acts as a gate electrode ( 16 ) of a MOS structure and g. electrically contacting at least the upper section ( 20 ) of a second trench ( 14 ) such that it can be used as a series resistor ( 20 ) for the gate electrode ( 16 ) of the MOS structure can act. The method of claim 10, wherein after step c) and before step d) the following steps are performed: k. Filling the trenches ( 14 ) with conductive material so that a lower conductive portion ( 28 ) l. Removing a portion of the conductive material of the lower conductive portion ( 28 ) up to a height h ₁ by means of an etching process m. Production of an insulating separating layer ( 24 ) between the lower conductive portion and the upper conductive portion. Control device for a vehicle, comprising at least one semiconductor component ( 10 ) according to one of claims 1 to 10.

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