JP2005181347A - Inspection device, inspection system and inspection method for circuit pattern - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an inspection device, an inspection system and an inspection method for a circuit pattern, capable of enhancing using convenience by improving a screen function of the inspection device for the circuit pattern for inspecting defects in the circuit pattern in a wafer, a mask, a reticle or the like, i.e. thinning in a linear or hole-like shape, a chip, a formation defect, a foreign matter or the like, and capable of enhancing a production yield of a semiconductor device by discovery of the defect at an early stage, investigation of the cause thereof and countermeasures at the early stage, as the inspection system as a whole. <P>SOLUTION: The inspection device for circuit pattern is constituted to display an image signal transmitted from another device. The inspection system for the circuit pattern is provided with an electron beam visual inspection device, provided with a monitor for displaying the defect on a map; and an external visual inspection device for storing an image of the defect, and is constituted to display concurrently the map and the image of the defect on the monitor. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a circuit pattern inspection apparatus and method in a method for manufacturing a substrate having a fine circuit pattern such as a semiconductor device, a photomask, and a liquid crystal.

  A semiconductor wafer inspection will be described as an example. A semiconductor device is manufactured by repeating a process of transferring a pattern formed on a photomask on a semiconductor wafer by lithography and etching. In the manufacturing process of a semiconductor device, the quality of lithography processing, etching processing, and other conditions, and the occurrence of foreign matter greatly affect the yield of the semiconductor device. Therefore, in order to detect abnormalities and defects early or in advance, the semiconductor in the manufacturing process A method for inspecting a pattern on a wafer has been conventionally performed.

  As a method for inspecting a defect existing in a pattern on a semiconductor wafer, a defect inspection apparatus that irradiates a semiconductor wafer with white light and compares the same kind of circuit patterns of a plurality of LSIs using an optical image has been put into practical use. . An outline of the inspection method is described in Patent Document 1. Further, in the inspection method using an optical image, as described in Patent Document 2, an optically illuminated region on a substrate is imaged by a time delay integration sensor, and the image and design characteristics inputted in advance are used. As described in Patent Document 3, a method for detecting defects by comparing images and monitoring image degradation at the time of image acquisition and correcting it at the time of image detection enables comparative inspection with a stable optical image. A method of performing is disclosed. When a semiconductor wafer in the manufacturing process is inspected by such an optical inspection method, residues and defects of a pattern having a silicon oxide film or a photosensitive photoresist material on the surface through which light is transmitted cannot be detected. Moreover, the etching residue which is below the resolution of the optical system and the non-opening defect of the minute conduction hole could not be detected. Furthermore, a defect generated at the bottom of the step of the wiring pattern could not be detected.

  As described above, defect detection by optical images has become difficult due to miniaturization of circuit patterns, complicated circuit pattern shapes, and diversification of materials, so electron beam images with higher resolution than optical images are used. A method for comparing and inspecting circuit patterns has been proposed. In order to obtain a practical inspection time when comparing and examining circuit patterns with electron beam images, images are acquired at a much higher speed than observation with a scanning electron microscope (hereinafter abbreviated as SEM). There is a need. And it is necessary to ensure the resolution of the image acquired at high speed and the SN ratio of the image.

  As a comparative inspection apparatus for patterns using electron beams, Patent Document 4, Patent Document 5, Patent Document 6, and Patent Document 7 have an electron beam having an electron beam current 100 times or more (10 nA or more) of a normal SEM. Irradiates a conductive substrate (X-ray mask, etc.), detects any secondary electrons, reflected electrons, or transmitted electrons, and automatically detects defects by comparing and inspecting images formed from the signals. A method is disclosed.

  As a method for inspecting or observing a circuit board having an insulator with an electron beam, Patent Document 8 and Patent Document 9 describe a stable image by irradiation with a low acceleration electron beam of 2 keV or less in order to reduce the influence of charging. A method of obtaining is disclosed. Further, Patent Document 10 discloses a method of irradiating ions from the back of a semiconductor substrate, and Patent Document 11 discloses a method of canceling charging of an insulator by irradiating light onto the surface of the semiconductor substrate.

  In addition, it is difficult to obtain a high-resolution image due to the space charge effect with an electron beam with a large current and low acceleration. As a method for solving this, Patent Document 12 discloses a high-acceleration electron beam immediately before the sample. A method of slowing down and irradiating the sample as a substantially low acceleration electron beam is disclosed.

  As a method for acquiring an electron beam image at a high speed, Patent Document 13 and Patent Document 12 disclose a method of continuously irradiating and acquiring a semiconductor wafer on a sample table while moving the sample table continuously. . In addition, as a secondary electron detection device used in a conventional SEM, a configuration using a scintillator (aluminum-deposited phosphor), a light guide, and a photomultiplier tube is used. Is not suitable for forming an electron beam image at a high speed because it detects light emitted from a phosphor and has poor frequency response. In order to solve this problem, Patent Document 12 discloses a detection means using a semiconductor detector as a detection device for detecting a high-frequency secondary electron signal.

Magazine Monthly Semiconductor World, August 1995, pages 96 to 99 JP-A-3-167456 Japanese Examined Patent Publication No. 6-58220 “Journal of Vacuum Science Technology B”, Vol. 9, No. 6, pp. 3005-3009, 1991 (J. Vac. Sci. Tech. B, Vol. 9, No. 6, pp .3005-3009 (1991)) “Journal of Vacuum Science Technology B”, Vol. 10, No. 6, pages 2804 to 2808, 1992 (J. Vac. Sci. Tech. B, Vol. 10, No. 6, pp. .2804-2808 (1992)) JP-A-5-258703 US Pat. No. 5,502,306 JP 59-155941 A "Electron and Ion Beam Handbook" (Nikkan Kogyo Shimbun) Pages 622 to 623 JP-A-2-15546 JP-A-6-338280 JP-A-5-258703 JP 59-160948

  In the conventional apparatus, in the conventional circuit pattern inspection apparatus, the screen function of the circuit pattern inspection apparatus is not fully utilized, and the visual inspection of the substrate is not always easily performed. The usability was bad. Therefore, it has been difficult to discover early defects in the inspection system and inspection method, investigate the cause, and improve the manufacturing yield of semiconductor devices by early countermeasures.

  The present invention has been made in view of the above points, and is a circuit for inspecting defects in circuit patterns such as wafers, masks, and reticles, that is, thinness, chipping, formation defects, foreign matter, etc. Improve the screen function of the pattern inspection device, improve usability, find the early defect as a whole inspection system, investigate the cause, and improve the manufacturing yield of semiconductor devices by early countermeasures, circuit pattern inspection device, inspection It is an object to provide a system and an inspection method.

  According to this embodiment, the feature of the defect is extracted from the image of the defect acquired by the irradiation of the charged particle beam, the defect is classified from the feature, and the image of the defect is irradiated by the irradiation of the charged particle beam based on the classification. It is configured to re-acquire and display.

  Further, the circuit pattern inspection apparatus is configured to display an image signal transmitted from another apparatus.

  Further, the circuit pattern inspection system includes an electron beam appearance inspection apparatus having a monitor for displaying a defect on a map and an external appearance inspection apparatus storing an image of the defect, and the map and the defect image are simultaneously displayed on the monitor. It is configured to display.

  Further, the circuit pattern inspection system is based on an inspection apparatus for extracting defects on a substrate at the end of a predetermined manufacturing process among a plurality of manufacturing processes for forming a circuit pattern on the substrate, and an inspection result by the inspection apparatus. And an observation device for observing the substrate or a part thereof, and an analysis device connected to the inspection device and analyzing the inspection result by the inspection device, the analysis device in a specific step of the manufacturing process Increase in the number of defects or foreign matter, calculate the correlation between the yield rate generated in the final step of the manufacturing process and the increase rate of defects or foreign matter, and the calculation results and the history of each processing device in the manufacturing process Based on the above, it is configured to classify defects or foreign matters.

  In addition, a circuit pattern inspection system includes an inspection apparatus that performs inspection of a substrate and extracts defects at the end of a predetermined manufacturing process among a plurality of manufacturing processes for forming a circuit pattern on a substrate, and the inspection apparatus. Based on the inspection result, it is connected to an observation device for observing defects present on the substrate or a part thereof, and has a transmission means for sending the inspection result, and the coordinates of the substrate of the inspection executed by the inspection device The observation substrate executed by the observation apparatus or the coordinates of a part of the observation substrate are common or compatible with each other.

  In addition, a circuit pattern inspection system includes an inspection apparatus that performs inspection of a substrate and extracts defects at the end of a predetermined manufacturing process among a plurality of manufacturing processes for forming a circuit pattern on a substrate, and the inspection apparatus. Based on the inspection result, it is connected with an observation device for observing defects present on the substrate or a part thereof, and has a transmission means for sending the inspection result. In this configuration, the position of the defect detected by the apparatus is detected on the basis of the marking attached to the place where the position of the defect is known.

  In addition, the circuit pattern inspection system calculates the correlation between the yield rate generated in the final process of the manufacturing process and the increase rate of defects or foreign matter, and based on the calculation result and the history of each processing apparatus in the manufacturing process. And a process for classifying defects or foreign matters.

  Further, the circuit pattern inspection method calculates the correlation between the yield rate generated in the final process of the manufacturing process and the increase rate of defects or foreign matter, and based on the calculation result and the history of each processing apparatus in the manufacturing process. And a process for classifying defects or foreign matters.

  In the present embodiment, the cell area means one unit of the area to be inspected, and means a specific process area in the chip from the case of each chip on the wafer. It changes depending on the user's inspection request until it makes sense. In the present embodiment, the user inspection request areas are collectively referred to as cell areas and used.

  As described above, according to the present invention, a circuit pattern for inspecting defects in circuit patterns such as wafers, masks, and reticles, that is, thinning, chipping, formation defects, foreign matter, etc. Circuit pattern inspection device, inspection system, which improves the screen function of inspection equipment, improves usability, and enables early detection of defects and investigation of their causes as a whole inspection system, and improvement in manufacturing yield of semiconductor devices through early countermeasures, And an inspection method can be provided.

  Hereinafter, embodiments of an inspection apparatus, an inspection system, and an inspection method of the present invention will be described in detail with reference to the drawings.

  The configuration of the circuit pattern inspection apparatus 1 according to the embodiment is shown in FIG. The circuit pattern inspection apparatus 1 includes an inspection chamber 2 in which the chamber is evacuated, and a preliminary chamber (not shown in the present embodiment) for transporting the substrate 9 to be inspected into the inspection chamber 2. The chamber is configured so that it can be evacuated independently of the examination chamber 2. The circuit pattern inspection apparatus 1 includes a control unit 6 and an image processing unit 5 in addition to the inspection room 2 and the spare room.

  The inspection chamber 2 is roughly divided into an electron optical system 3, a secondary electron detection unit 7, a sample chamber 8, and an optical microscope unit 4. The electron optical system 3 includes an electron gun 10, an electron beam extraction electrode 11, a condenser lens 12, a blanking deflector 13, a scanning deflector 15, an aperture 14, an objective lens 16, a reflector 17, and an E cross B deflector 18. Has been.

  Of the secondary electron detector 7, the secondary electron detector 20 is disposed above the objective lens 16 in the examination room 2. The output signal of the secondary electron detector 20 is amplified by a preamplifier 21 installed outside the examination room 2 and converted into digital data by an AD converter 22.

  The sample chamber 8 includes a sample stage 30, an X stage 31, a Y stage 32, a rotary stage 33, a position monitor length measuring device 34, and a substrate height measuring device 35 to be inspected. The optical microscope unit 4 is installed in the vicinity of the electron optical system 3 in the examination room 2 and at a position that does not affect each other, and the distance between the electron optical system 3 and the optical microscope unit 4 Is known. Then, the X stage 31 or the Y stage 32 reciprocates a known distance between the electron optical system 3 and the optical microscope unit 4. The optical microscope unit 4 includes a light source 40, an optical lens 41, and a CCD camera 42. The image processing unit 5 includes a first image storage unit 46, a second image storage unit 47, a calculation unit 48, and a defect determination unit 49. The captured electron beam image or optical image is displayed on the monitor 50.

  Operation commands and operation conditions of each part of the apparatus are input from the control unit 6. In the control unit 6, conditions such as an acceleration voltage at the time of electron beam generation, an electron beam deflection width, a deflection speed, a signal acquisition timing of a secondary electron detector, a sample stage moving speed, etc. are arbitrarily or arbitrarily selected according to the purpose. It is input so that it can be set. The control unit 6 uses the correction control circuit 43 to monitor the position and height deviation from the signals of the position monitor length measuring device 34 and the inspected substrate height measuring device 35, and generates a correction signal from the result. A correction signal is sent to the objective lens power supply 45 and the scanning signal generator 44 so that the electron beam is always irradiated to the correct position.

  In order to acquire an image of the substrate 9 to be inspected, the primary electron beam 19 that is narrowed down is irradiated onto the substrate 9 to be inspected to generate secondary electrons 51, which are scanned by the primary electron beam 19 and the X stage 31. By detecting in synchronization with the movement of the Y stage 32, an image of the surface of the substrate 9 to be inspected is obtained. As described in the subject of the present invention, in the automatic inspection of the present invention, it is essential that the inspection speed is high. Therefore, unlike an ordinary SEM, an electron beam having an electron beam current of the pA order is scanned at a low speed, and multiple scans and superposition of each image are not performed. Further, in order to suppress charging of the insulating material, it is necessary to scan the electron beam once or several times at a high speed. Therefore, in this embodiment, an image is formed by scanning a high-current electron beam of about 100 times or more, for example, 100 nA, which is about 100 times that of a normal SEM, only once. The scanning width was 100 μm, one pixel was 0.1 μm square, and one scan was performed in 1 μs.

  The electron gun 10 uses a diffusion replenishment type thermal field emission electron source. By using this electron gun 10, it is possible to secure a stable electron beam current as compared with, for example, a conventional tungsten (W) filament electron source or a cold field emission electron source. An image is obtained. Further, since the electron beam current can be set large by the electron gun 10, high-speed inspection as described later can be realized.

  The primary electron beam 19 is extracted from the electron gun 10 by applying a voltage between the electron gun 10 and the extraction electrode 11. The primary electron beam 19 is accelerated by applying a high-voltage negative potential to the electron gun 10. As a result, the primary electron beam 19 travels in the direction of the sample stage 30 with energy corresponding to the electric potential, is converged by the condenser lens 12, and is further narrowed down by the objective lens 16 to be X stage 31 and Y stage on the sample stage 30. The substrate 9 to be inspected (a substrate having a fine circuit pattern such as a semiconductor wafer, a chip or a liquid crystal, a mask) mounted on the substrate 32 is irradiated. The blanking deflector 13 is connected to a scanning signal generator 44 that generates a scanning signal and a blanking signal, and the condenser lens 12 and the objective lens 16 are connected to a lens power source 45, respectively.

  A negative voltage can be applied to the substrate 9 to be inspected by a retarding power source 36. By adjusting the voltage of the retarding power source 36, the primary electron beam is decelerated, and the electron beam irradiation energy to the substrate 9 to be inspected can be adjusted to an optimum value without changing the potential of the electron gun 10.

  Secondary electrons 51 generated by irradiating the substrate 9 to be inspected with the primary electron beam 19 are accelerated by a negative voltage applied to the substrate 9 to be inspected. An E-cross B deflector 18 is disposed above the substrate 9 to be inspected, and the secondary electrons 51 accelerated thereby are deflected in a predetermined direction. The amount of deflection can be adjusted by the voltage applied to the E-cross B deflector 18 and the strength of the magnetic field. The electromagnetic field can be varied in conjunction with a negative voltage applied to the sample.

  The secondary electrons 51 deflected by the E-cross B deflector 18 collide with the reflecting plate 17 under a predetermined condition. The reflection plate 17 has a conical shape integrally with a shield pipe of a deflector of an electron beam (hereinafter referred to as a primary electron beam) irradiated on a sample. When the accelerated secondary electrons 51 collide with the reflector 17, second secondary electrons 52 having an energy of several V to 50 eV are generated from the reflector 17.

  The secondary electron detector 7 includes a secondary electron detector 20 inside the evacuated examination chamber 2, and a preamplifier 21, an AD converter 22, a light conversion means 23, and a light transmission means 24 outside the examination room 2. , Electrical conversion means 25, high-voltage power supply 26, preamplifier drive power supply 27, AD converter drive power supply 28, and reverse bias power supply 29.

  As already described, in the secondary electron detector 7, the secondary electron detector 20 is disposed above the objective lens 16 in the examination room 2. The secondary electron detector 20, the preamplifier 21, the AD converter 22, the light conversion means 23, the preamplifier drive power supply 27, and the AD converter drive power supply 28 are floated to a positive potential by the high voltage power supply 26. The second secondary electrons 52 generated by colliding with the reflecting plate 17 are guided to the secondary electron detector 20 by this attractive electric field. The secondary electron detector 20 is a second secondary electron generated when the secondary electron 51 generated while the primary electron beam 19 is irradiated on the substrate 9 to be inspected is then accelerated and collides with the reflecting plate 17. 52 is detected in conjunction with the scanning timing of the primary electron beam 19.

  The output signal of the secondary electron detector 20 is amplified by a preamplifier 21 installed outside the examination room 2 and converted into digital data by an AD converter 22. The AD converter 22 is configured to immediately convert the analog signal detected by the secondary electron detector 20 into a digital signal after being amplified by the preamplifier 21 and transmit the digital signal to the image processing unit 5. The detected analog signal can be digitized immediately after detection.

  A substrate 9 to be inspected is mounted on the X stage 31 and the Y stage 32, and a method of scanning the primary electron beam 19 two-dimensionally with the X stage 31 and the Y stage 32 stationary at the time of executing the inspection, and at the time of executing the inspection One of the methods of scanning the primary electron beam 19 in a straight line in the X direction by continuously moving the X stage 31 and the Y stage 32 in the Y direction at a constant speed can be selected.

  When inspecting a specific relatively small area, the former stage is inspected with the stationary stage, and when inspecting a relatively large area, the stage is continuously moved at a constant speed and inspected. It is. When the primary electron beam 19 needs to be blanked, the blanking deflector 13 deflects the primary electron beam 19 so that the electron beam does not pass through the diaphragm 14.

  As the position monitor length measuring device 34, a length measuring device based on laser interference is used in this embodiment. The positions of the X stage 31 and the Y stage 32 can be monitored in real time and transferred to the control unit 6. Similarly, data such as the number of rotations of the motors of the X stage 31, the Y stage 32, and the rotary stage 33 is also transferred from each driver to the control unit 6, and the control unit 6 Based on the data, the region and position where the primary electron beam 19 is irradiated can be accurately grasped. If necessary, the correction control circuit 43 corrects the displacement of the irradiation position of the primary electron beam 19 in real time. In addition, the region irradiated with the electron beam can be stored for each substrate to be inspected.

  As the inspected substrate height measuring device 35, an optical measuring device that is a measuring method other than an electron beam, for example, a laser interference measuring device or a reflected light measuring device that measures changes at the position of reflected light is used. The height of the substrate 9 to be inspected mounted on the stage 31 and the Y stage 32 is measured together with the actual operation, that is, configured to measure in real time. In this embodiment, the inspected substrate 9 is irradiated with the elongated white light that has passed through the slit through the transparent window, the position of the reflected light is detected by the position detection monitor, and the amount of change in height is determined from the change in position. The calculation method was used. Based on the measurement data of the inspected substrate height measuring device 35, the focal length of the objective lens 16 for narrowing the primary electron beam 19 is dynamically corrected, and the primary electron beam 19 always focused on the non-inspection region. Can be irradiated. It is also possible to measure the warpage and height distortion of the inspected substrate 9 before electron beam irradiation, and to set correction conditions for each inspection region of the objective lens 16 based on the data. It is.

  The image processing unit 5 includes a first image storage unit 46, a second image storage unit 47, a calculation unit 48, a defect determination unit 49, and a monitor 50. The image signal of the inspected substrate 9 detected by the secondary electron detector 20 is amplified by the preamplifier 21, digitized by the AD converter 22, converted into an optical signal by the light conversion means 23, and light transmission means 24, converted into an electrical signal again by the electrical conversion means 25, and stored in the first image storage unit 46 or the second image storage unit 47. The arithmetic unit 48 aligns the stored image signal with the image signal of the other storage unit, performs standardization of the signal level, and performs various image processing for removing the noise signal, and compares both image signals. Calculate. The defect determination unit 49 compares the absolute value of the difference image signal calculated by the calculation unit 48 with a predetermined threshold value, and if the difference image signal level is larger than the predetermined threshold value, the defect determination unit 49 determines that the pixel is defective. The candidate is determined, and the position, the number of defects, and the like are displayed on the monitor 50.

  The overall configuration of the circuit pattern inspection apparatus 1 has been described so far, and the configuration and operation of the detection means for the secondary electrons 51 will be described in more detail. When the primary electron beam 19 enters the solid, the primary electron beam 19 enters the inside and excites electrons in the shell at each depth to lose energy. Along with this, a phenomenon occurs in which the backscattered electrons scattered back from the primary electron beam proceed toward the surface while exciting the electrons in the solid. Through these multiple processes, the electrons in the shell cross the surface barrier from the solid surface and become secondary electrons, and exit into the vacuum with energy of several V to 50 eV. The shallower the angle formed between the primary electron beam and the solid surface, the smaller the ratio between the distance of the primary electron beam and the distance from the position to the solid surface, and secondary electrons are more likely to be emitted from the surface. Therefore, the generation of secondary electrons depends on the angle between the primary electron beam and the solid surface, and the amount of secondary electron generation is information indicating the unevenness and material of the sample surface.

  FIG. 2 shows a main configuration diagram of the electron optical system 3 and the secondary electron detector 7 for detecting the secondary electrons 51. The primary electron beam 19 is applied to the substrate 9 to be inspected, and secondary electrons 51 are generated on the surface of the substrate 9 to be inspected. The secondary electrons 51 are accelerated by a negative high voltage applied to the substrate 9 to be inspected. The secondary electrons 51 are accelerated and converged and deflected by the objective lens 16 and the E-cross B deflector 18 and collide with the reflection plate 17. The reflector 17 has a conical shape with a taper integrated with a shield pipe for preventing the voltage applied to the detector from affecting the primary electron beam. A secondary electron multiplication effect was provided as a configuration that emits secondary electrons about five times the number of irradiated electrons on average. When the accelerated secondary electrons 51 collide, second secondary electrons 52 having an energy of several V to 50 eV are generated from the reflector 17. The second secondary electrons 52 are attracted to the front surface of the secondary electron detector 20 by the attraction electric field generated by the secondary electron detector 20 and the suction electrode 53 attached to the secondary electron detector 20.

  The electromagnetic field of the E cross B deflector 18 can be variably set in conjunction with a negative high voltage applied to the substrate 9 to be inspected. With the above configuration, when the secondary electrons 51 generated on the surface of the substrate 9 to be inspected pass through the E-cross B deflector 18, 95% or more can pass through, and the reflecting plate 17 makes this 95% secondary. The electrons 51 can be multiplied by about 5 times to generate second secondary electrons 52.

  As the secondary electron detector 20, a PIN type semiconductor detector is used in this embodiment. The PIN type semiconductor detector is faster in response than a normal PN type semiconductor detector, and can detect a high-frequency secondary electron signal having a sampling frequency of about 100 MHz by applying a reverse bias voltage from a reverse bias voltage power source. it can. The secondary electron detector 20 and the preamplifier 21, AD converter 22, and light converting means 23, which are detection circuits, are floated to a positive voltage. The second secondary electrons 52 generated in the reflecting plate 17 are attracted to the secondary electron detector 20 by the attraction electric field, enter the secondary electron detector 20 in a high energy state, and have a constant energy in the surface layer. After disappearing, electron-hole pairs are generated and converted into electric signals as current. The secondary electron detector 20 used in the present embodiment also has a very high signal detection sensitivity, and considering the energy loss in the surface layer, the second secondary electrons 52 that are accelerated by the attractive electric field and incident are about 1000. It becomes an electric signal amplified twice. The electric signal is further amplified by the preamplifier 21, and the amplified signal (analog signal) is converted into a digital signal by the AD converter 22. Then, the output of the AD converter 22 is provided with an optical conversion means 23, an optical transmission means 24, and an electrical conversion means 25 for each bit, and transmitted in parallel. According to this configuration, each transmission means only needs to have the same transmission speed as the clock frequency of the AD converter 22.

  Now, the signal converted into the optical digital signal by the optical conversion means 23 is transmitted to the electrical conversion means 25 by the optical transmission means 24, where it is converted again from the optical digital signal to the electrical signal and sent to the image processing unit 5. . The reason why the light signal is converted into an optical signal and then transmitted is that the components from the secondary electron detector 20 to the light converting means 23 are floated to a positive high potential by the high voltage power supply 26. The configuration of the embodiment can convert a high potential level signal into a ground level signal.

  In this embodiment, a light emitting element that converts an electrical signal into an optical signal is used as the optical conversion means 23, an optical fiber cable that transmits the optical signal is used as the optical transmission means 24, and an optical signal is converted into an electrical signal as the electrical conversion means 25. A light receiving element for conversion was used. Since the optical fiber cable is made of a highly insulating material, a high potential level signal can be easily converted to a ground potential level signal. Further, since digital signals are optically transmitted, there is no signal degradation at the time of optical transmission. As a result, it is possible to obtain an image with less influence of noise as compared with a conventional technique for optically transmitting an analog signal.

  In the above embodiment, the reverse bias voltage is applied to the secondary electron detector 20 by the reverse bias power supply 29, but a configuration in which no reverse bias voltage is applied may be employed. In this embodiment, a PIN type semiconductor detector is used as the secondary electron detector 20, but other types of semiconductor detectors such as a Schottky type semiconductor detector and an avalanche type semiconductor detector may be used. . Further, MCP (microchannel plate) can be used as a detector if conditions such as responsiveness and sensitivity are satisfied.

  Next, the operation when the circuit pattern inspection apparatus 1 inspects a semiconductor wafer subjected to pattern processing in the manufacturing process as the inspected substrate 9 will be described. First, although not shown in FIG. 1, the semiconductor wafer is loaded into the sample exchange chamber by the transfer means of the substrate 9 to be inspected. Therefore, the substrate 9 to be inspected is mounted on the sample holder, held and fixed, evacuated, and transferred to the inspection chamber 2 for inspection when the sample exchange chamber reaches a certain degree of vacuum. In the inspection chamber 2, the sample holder is placed on the sample stage 30, the X stage 31, the Y stage 32, and the rotary stage 33, and is held and fixed.

  The set inspected substrate 9 is arranged at a predetermined first coordinate under the optical microscope unit 4 by moving the X stage 31 and the Y stage 32 in the X and Y directions based on a predetermined inspection condition registered in advance. Then, the optical microscope image of the circuit pattern formed on the substrate 9 to be inspected is observed by the monitor 50 and compared with the corresponding comparison pattern image at the same position stored in advance for correcting the position rotation, and the first coordinate A position correction value is calculated. Next, move to a second coordinate where a circuit pattern equivalent to the first coordinate exists at a certain distance from the first coordinate, and similarly, an optical microscope image is observed and a circuit pattern image stored for position rotation correction And the position correction value of the second coordinate and the rotational deviation amount with respect to the first coordinate are calculated. The rotation stage 33 rotates by the calculated rotation deviation amount, and the rotation amount is corrected. In this embodiment, the rotational deviation amount is corrected by the rotation of the rotary stage 33. However, the rotational deviation can be corrected by a method of correcting the scanning deflection amount of the electron beam based on the calculated rotational deviation amount without the rotary stage 33. . In this optical microscope image observation, a circuit pattern that can be observed not only with an optical microscope image but also with an electron beam image is selected. Also, for future position correction, the first coordinate, the amount of displacement of the first circuit pattern by optical microscope image observation, the second coordinate, the amount of displacement of the second circuit pattern by optical microscope image observation Stored and sent to the control unit 6.

  Further, the circuit pattern formed on the substrate 9 to be inspected is observed using an image obtained by an optical microscope, and the position of the circuit pattern on the substrate 9 to be inspected, the distance between the chips, or the like The repeat pitch of the repeat pattern is measured in advance, and the measured value is input to the control unit 6. Further, the chip to be inspected on the substrate 9 to be inspected and the region to be inspected in the chip are set from the image of the optical microscope and input to the control unit 6 in the same manner as described above. The image of the optical microscope can be observed with a relatively low magnification, and when the surface of the substrate 9 to be inspected is covered with, for example, a silicon oxide film, it can be observed through the ground. This is because the layout of the chip and the layout of the circuit pattern in the chip can be easily observed, and the inspection area can be easily set.

  When the preparatory work such as the predetermined correction work and inspection area setting by the optical microscope unit 4 is completed as described above, the substrate 9 to be inspected moves below the electron optical system 3 by the movement of the X stage 31 and the Y stage 32. Is done. When the substrate 9 to be inspected is arranged under the electron optical system 3, the correction work performed by the optical microscope unit 4 and the work similar to the setting of the inspection area are performed by the electron beam image. Acquisition of the electron beam image at this time is performed by the following method.

  Based on the coordinate values stored and corrected in the alignment based on the optical microscope image, the primary electron beam 19 is moved in the X direction and the Y direction by the scanning signal generator 44 in the same circuit pattern as observed by the optical microscope unit 4. Irradiated by scanning in two dimensions. By the two-dimensional scanning of the electron beam, the secondary electrons 51 generated from the site to be observed are detected by the configuration and action of each part for detecting the secondary electrons, thereby obtaining an electron beam image. Simple inspection position confirmation, alignment, and position adjustment have already been performed using an optical microscope image, and rotation correction has also been performed in advance, so the resolution and resolution are higher than optical images, and high-precision alignment and position correction are possible. Rotation correction can be performed.

  When the primary electron beam 19 is irradiated onto the sample 9 to be inspected, the portion is charged. In order to avoid the influence of charging during inspection, the circuit pattern for irradiating the primary electron beam 19 in the pre-inspection preparatory work such as position rotation correction or inspection area setting is a circuit pattern that exists in advance outside the inspection area. Either an equivalent circuit pattern in a chip other than the chip to be inspected can be automatically selected from the control unit 6. Thereby, the influence which irradiated the primary electron beam 19 by the said pre-inspection preparatory work at the time of an inspection does not reach an inspection image.

  Next, an inspection is performed. The conditions of the primary electron beam 19 irradiated to the substrate 9 to be inspected at the time of inspection were obtained by the following method. First, the S / N ratio in an electron beam image is generally correlated with the square root of the number S of irradiated electrons per unit pixel of the electron beam irradiated on the sample. When comparing and inspecting images, the SN ratio of the electron beam image needs to be a value that can detect the signal amount of the normal part and the defective part, and the minimum SN ratio needs to be 10 or more, preferably 50 or more. is required. As described above, the S / N ratio of the electron beam image has a correlation with the square root of the number S of irradiated electrons per unit pixel of the electron beam irradiated on the sample. Therefore, in order to obtain the S / N ratio of 10, at least 100 per single pixel. More than one electron is required, and in order to obtain an SN ratio of 50, at least 2500 electrons must be irradiated.

  The purpose of applying this circuit pattern inspection method is to detect a minute defect that cannot be detected by the optical pattern inspection method as described above, that is, to recognize a difference between images in a minute pixel. was there. In order to achieve this, the pixel size is set to 0.1 μm square in this embodiment. Therefore, from the minimum required number of electrons per single pixel and the pixel size, the required electron beam irradiation amount per unit area is 0.16 μC / cm 2, preferably 4 μC / cm 2. If this electron irradiation amount is to be obtained by an electron beam current of normal SEM (several pA to several hundreds pA), for example, an electron beam current of 20 pA is used to irradiate an area of 1 cm 2 with 0.16 μC / cm 2 electrons. Requires 8000 seconds, and it takes 200,000 seconds to irradiate 4 μC / cm 2 of electrons. However, the inspection speed required for inspection of circuit patterns, for example, inspection of semiconductor wafers is 600 s / cm 2 or less, preferably 300 s / cm 2 or less. Is very low. Therefore, in order to satisfy these conditions and irradiate the sample with a necessary electron beam in a practical inspection time, the electron beam current is at least 270 pA (1.6 μC / cm 2, 600 s / cm 2), preferably 13 nA. It is necessary to set it to (4 μC / cm 2, 300 s / cm 2) or more. Therefore, in the circuit pattern inspection method of this embodiment, an electron beam image is formed by a single scan using a high-current electron beam of 13 nA or more.

  Then, it is necessary from the point of inspection speed to form an electron beam image by a single scan using an electron beam of about 100 times larger current (270 nA or more, preferably 13 nA or more) than a normal SEM. In addition, for the reasons described below, the base film or surface pattern is necessary for inspecting a circuit pattern formed of an insulating material.

  When an electron beam image of a circuit pattern having an insulating material is acquired by a normal SEM, an electron beam image different from the actual shape is obtained due to the influence of charging, and the contrast is completely different depending on the field magnification. This is because the weak electron beam current (several pA to several hundred pA) is repeatedly scanned locally, or when the field magnification is changed, the electron dose exceeds the electron dose necessary for image formation for focus and astigmatism correction. This is because by locally scanning the electron beam, the electron beam irradiation amount is concentrated and irradiated at one place, and the charging of the portion becomes uneven. As a result, since the quality of the electron beam image of the pattern formed of the insulating material is completely different depending on the field of view, such an image cannot be applied to the inspection for comparing the electron beam images. Therefore, in order to be able to inspect a circuit pattern having an insulating material in the same manner as a circuit pattern of a conductive material, a single scan is performed using a high-current electron beam that is about 100 times more than a normal SEM. An electron beam image was formed.

  That is, in this example, the electron beam irradiation amount to the sample per unit area and per unit time is constant, and the electron dose necessary to form an image quality sufficient to perform a comparative inspection, The electron beam image was acquired by scanning the electron beam once at a scanning speed suitable for the practicality of the inspection method for a semiconductor wafer or the like. Then, as described above, when an electron beam image of a circuit pattern having an insulating material is obtained by a single scan using a high-current electron beam about 100 times or more compared to a normal SEM, an electron beam image within one field of view is obtained. It was confirmed that the charge amount and image contrast differ depending on the constituent materials and structures of the various circuit patterns constituting the same, and that similar image contrast can be obtained between equivalent patterns of the same type of material. Although scanning with a high-current electron beam is performed only once in the present embodiment, scanning may be performed several times within a range in which the above-described operation is substantially realized.

  Next, irradiation conditions that affect the contrast of the electron beam image will be described. The contrast of the electron beam image is formed by the amount of secondary electrons generated and detected by the electron beam irradiated on the sample. For example, the difference in brightness is caused by the difference in the amount of secondary electrons generated due to the difference in materials. . FIG. 3 is a graph showing the influence of the electron beam irradiation condition on the contrast. FIG. 3A shows the case where the irradiation condition is appropriate, and FIG. 3B shows the case where the irradiation condition is inappropriate. Yes. The vertical axis represents the degree of charging having a large correlation with the brightness of the image, and the horizontal axis represents the electron beam irradiation time. A solid line A indicates a case where a photoresist is used for the sample, and a dotted line B indicates a case where a wiring material is used for the sample.

  As shown in FIG. 3A, in the time region C where the irradiation time is short, the brightness fluctuation of each material is small, and in the time region D where the irradiation time is relatively large, the change in brightness due to the irradiation time becomes large. In particular, in the time region E in which the irradiation time is long, the brightness fluctuation due to the irradiation time is reduced again. Further, as shown in FIG. 3B, when the irradiation condition is not appropriate, even in the time region C where the irradiation time is short, the brightness variation with respect to the irradiation time is large, and it is difficult to obtain a stable image. Therefore, in order to acquire a high-speed and stable electron beam image, it is important to acquire the image under the irradiation conditions shown in FIG.

  Examples of the irradiation condition of the electron beam to the sample include an electron beam irradiation amount per unit area, an electron beam current value, an electron beam scanning speed, and an electron beam irradiation energy applied to the sample. Therefore, it is necessary to obtain optimum values for these parameters for each shape and material of the circuit pattern. For this purpose, it is necessary to freely adjust and control the irradiation energy of the electron beam applied to the sample. Therefore, as described above, in this embodiment, a negative voltage for decelerating primary electrons is applied to the substrate 9 to be inspected, which is a sample, by the retarding power supply 36, and the primary electron beam 19 is irradiated by adjusting this voltage. The energy can be adjusted as appropriate. As a result, when the acceleration voltage applied to the electron gun 10 is changed, the axis of the primary electron beam 19 is changed and various adjustments are required. In the present embodiment, the same is performed without performing such adjustments. The effect of can be obtained.

  Next, a scanning method of the primary electron beam 19 for forming an electron beam image for inspection will be described. In a normal SEM, an electron beam is scanned two-dimensionally with the stage stationary to form an image of a certain area. According to this method, when inspecting all over a wide area, in addition to the time for stationary scanning of the electron beam for each image acquisition area, the time obtained by adding stage acceleration, deceleration, and position settling as the movement time It takes. Therefore, it takes a long time for the entire inspection time. Therefore, in the present invention, while moving the stage continuously in one direction at a constant speed, the electron beam is scanned in one direction at a high speed in a direction orthogonal to or intersecting the stage moving direction, thereby The acquired inspection method was used. Thereby, the electron beam acquisition time for one scanning width of the predetermined distance is only the time for the stage to move the predetermined distance.

  FIG. 4 is a plan view showing the scanning direction of the primary electron beam 19 on the substrate 9 to be inspected. FIG. 4A shows an example of the direction in which the primary electron beam 19 scans when the Y stage 32 continuously moves at a constant speed in the Y direction by the above method. When the primary electron beam 19 is scanned by the scanning signal generator 44, the substrate 9 to be inspected is irradiated with the electron beam only in one direction indicated by the solid line, and during the return of the electron beam indicated by the broken line, it is irradiated. By blanking the test substrate 9 so that the primary electron beam 19 is not irradiated, the electron beam can be uniformly and spatially irradiated on the substrate 9 to be inspected. Blanking is performed by deflecting the primary electron beam 19 by the blanking deflector 13 so as not to pass through the diaphragm 14.

  FIG. 4B shows a case where the primary electron beam 19 reciprocates at a constant speed as an example of another scanning direction. When the primary electron beam 19 is scanned from one end to the other at a constant speed, the X stage 31 and the Y stage 32 are sent by one pitch, and the electron beam is scanned to the original end in the opposite direction at a constant speed. In the case of this method, the time for returning the electron beam can be omitted.

  The region or position where the electron beam is irradiated can be determined in detail by measuring data from the position monitor length measuring device 34 installed on the X stage 31 and the Y stage 32 from time to time. Be grasped. In this embodiment, a laser interferometer is employed. Similarly, the variation in the height of the region or position irradiated with the primary electron beam 19 is grasped in detail by transferring the measurement data of the inspected substrate height measuring device 35 to the control unit 6 every moment. The Based on these data, deviations in the electron beam irradiation position and focus position are calculated, and these deviations are automatically corrected by the correction control circuit 43. Therefore, a highly accurate and precise electron beam operation method is ensured.

  By the scanning method of the primary electron beam 19 described above, the entire surface of the substrate 9 to be inspected as a sample or a predetermined inspection region is irradiated with an electron beam, and secondary electrons 51 are generated according to the above-described principle. Secondary electrons 51 and 52 are detected. A good-quality image can be obtained by the configuration and operation of the above-described units. For example, by irradiating the reflector 17 with the above-described configuration and method, a secondary electron multiplication effect of about 20 times can be obtained, and the influence of aberration on the primary electron beam can be suppressed more than the conventional method. Can do.

  Further, by adjusting the electromagnetic field applied to the E-cross B deflector 18 with the same configuration, the reflected electrons generated from the surface of the substrate 9 to be inspected are irradiated to the reflecting plate 17 like the secondary electrons. The secondary secondary electrons 52 can be easily detected. Further, by adjusting and controlling the electric field and magnetic field of the E-cross B deflector 18 in conjunction with the negative high voltage applied to the sample, secondary electrons can be detected efficiently even under irradiation conditions that differ from sample to sample. In addition, the method of detecting secondary electrons using the secondary electron detector 20 and digitizing the detected image signal immediately after detection and then optically transmitting it reduces the effect of noise generated in various conversions and transmissions. , Image signal data having a high SN ratio can be obtained.

  In the process of forming an electron beam image from the detected signal, the image processing unit 5 sends a detection signal corresponding to the desired pixel at the electron beam irradiation position designated by the control unit 6 in accordance with the signal level. The brightness gradation value is sequentially stored in the first image storage unit 46 or the second image storage unit 47. By associating the electron beam irradiation position with the amount of secondary electrons associated with the detection time, an electron beam image of the sample circuit pattern is formed two-dimensionally. In this way, a high-quality electron beam image with high accuracy and high SN ratio can be acquired.

  When the image signal is transferred to the image processing unit 5, the electron beam image of the first region is stored in the first image storage unit 46. The arithmetic unit 48 aligns the stored image signal with the image signal of the other storage unit, normalizes the signal level, and performs various image processes for removing the noise signal. Subsequently, the electron beam image of the second region is stored in the second image storage unit 47 and subjected to the same calculation process, and the same circuit of the electron beam image of the second region and the first electron beam image is used. Comparing the pattern and place image signals. The defect determination unit 49 compares the absolute value of the difference image signal calculated by the calculation unit 48 with a predetermined threshold value, and if the difference image signal level is larger than the predetermined threshold value, the defect determination unit 49 determines that the pixel is defective. The candidate is determined, and the position, the number of defects, and the like are displayed on the monitor 50. Next, the electron beam image of the third region is stored in the first image storage unit 46 and compared with the electron beam image of the second region previously stored in the second image storage unit 47 while performing the same calculation. It is calculated and a defect is determined. Thereafter, by repeating this operation, image processing is executed for all inspection regions.

  By obtaining a high-accuracy and high-quality electron beam image by the above-described inspection method and performing a comparative inspection, it is possible to detect a minute defect generated on a fine circuit pattern in an inspection time according to practicality. In addition, by acquiring an image using an electron beam, the optical pattern inspection method transmits light and cannot be inspected, such as a pattern defect formed by a silicon oxide film or a resist film, or foreign materials of these materials. Defects can be inspected. Furthermore, even when the material forming the circuit pattern is an insulator, the inspection can be performed stably.

  Next, an application example in which a semiconductor wafer is inspected using the circuit pattern inspection apparatus 1 and method will be described. FIG. 5 is a flowchart showing a semiconductor device manufacturing process. As shown in FIG. 5, the semiconductor device repeats a number of pattern forming steps from wafer start / surface oxidation 61 to step 2, step 3, step n, and step n + 162. One pattern forming process is roughly composed of the steps of film formation 63, resist coating 64, photosensitivity 65, development 66, etching 67, resist removal 68, and cleaning 69. In each of these steps, the circuit pattern of the semiconductor device formed on the substrate cannot be normally formed unless the manufacturing conditions for processing are optimized. Therefore, for example, by performing automatic appearance inspections 60a and 60b after the process of development 66 and resist removal 68, it is possible to detect defects early in the process and prevent a decrease in manufacturing yield. .

  FIG. 6 shows an outline of a circuit pattern formed on a semiconductor wafer in the manufacturing process. 6A shows a circuit pattern that has been processed normally, and FIG. 6B shows a pattern in which a processing defect has occurred. For example, when an abnormality occurs in the film forming process of FIG. 5, particles are generated and adhere to the surface of the semiconductor wafer, resulting in an isolated defect or the like in FIG. Further, if the conditions such as the focal point of the exposure apparatus for exposure and the exposure time are not optimal at the time of exposure, there are places where the amount and intensity of light irradiated by the resist are excessive or insufficient, and FIG. It becomes short inside, disconnection, and pattern thinning. If there is a defect in the mask / reticle at the time of exposure, the same pattern shape abnormality occurs at the same location for each shot which is a photosensitive unit. In addition, when the etching amount is not optimized and a thin film or particles generated during the etching, a short circuit, a protrusion, an isolated defect, an opening defect, or the like occurs. At the time of cleaning, fine particles are generated due to dirt on the cleaning layer, detached film, and reattachment of foreign matter, and the thickness of the oxide film is likely to be uneven on the surface due to water draining conditions during drying.

  Therefore, by applying the circuit pattern inspection apparatus 1 shown in FIG. 1 described above to the manufacturing process of a semiconductor device, the occurrence of abnormality can be detected with high accuracy and at an early stage, and countermeasures for abnormality are taken in the process. The machining conditions can be optimized so that these defects do not occur. For example, when a circuit pattern inspection process is performed after the development process, and a defect or disconnection in the photoresist pattern is detected, it is estimated that the exposure condition or focus condition of the exposure apparatus in the photosensitive process is not optimal, and the focus condition Alternatively, these conditions are immediately improved by adjusting the exposure amount. In addition, by examining whether or not these defects occur in common between shots from the defect distribution, the defects of the photomask and reticle used for pattern formation are estimated, and inspection and replacement of the photomask and reticle are performed. Will be implemented as soon as possible. The same applies to other processes, and by applying the circuit pattern inspection method and apparatus of the present invention and carrying out the inspection process, various defects are detected, and abnormalities in each manufacturing process are detected depending on the contents of the detected defects. The cause is presumed.

  As described above, in the manufacturing process of the semiconductor device, by implementing the circuit pattern inspection apparatus or inspection method according to the present invention, variations in various manufacturing conditions and occurrences of abnormalities can be detected within the actual inspection time. It is possible to prevent the occurrence of defects. In addition, by applying the circuit pattern inspection method and apparatus, the non-defective product acquisition rate of the entire semiconductor device can be predicted from the degree and occurrence frequency of detected defects, and the productivity of the semiconductor device can be improved. become.

  The inspection of a semiconductor device is roughly divided into setting of inspection conditions, execution of inspection, confirmation of extracted defects and classification, and in this embodiment, these are called recipe creation mode, inspection mode, and defect confirmation mode. It also has a utility mode for managing the obtained defect data files.

  After the inspection conditions are set and the inspection is executed, the extracted defects are confirmed and classified in the defect confirmation mode.

  FIG. 7 is a flowchart showing an execution procedure in the defect confirmation mode. It is determined whether the SEM image formed by the one-time irradiation acquired and displayed in step 300 can be automatically classified by the automatic classification mode in step 301. If NO, a manual SEM image is reacquired and displayed in step 302. If it is in the classification mode (YES), the defect (abnormality) is determined in step 303 and classified. In this classification, the position (y-coordinate, x-coordinate), size, brightness, or shape of a displayed defect, and other defect characteristic values are larger or smaller than predetermined attribute values. Depending on what you do. This determination and confirmation can be performed automatically or manually, that is, automatically or manually. When classification can be performed according to a predetermined classification in this way (when matching the classification), an SEM image is automatically reacquired and displayed at step 304. Next, in step 305, the inspection result is output. When the classification is unmatched, or when manual SEM image reacquisition and display, the inspection result at this stage is output. When the inspection result output is completed, the process proceeds to the next step 306 of wafer unloading.

  A specific defect can be extracted by the above procedure. Further, the SEM image acquired at the time of inspection is stored in a file, and the defect can be reconfirmed by displaying the filed SEM image again according to the judgment of the operator.

  FIG. 8 shows a screen at the end of the automatic inspection in the inspection mode. At the top of the screen, an area 201 for displaying time, device ID, inspection target board name, operator name, and the like, and a message area 202 for displaying various messages are arranged. At the bottom of the screen, an “inspection” button 203 for designating an inspection mode instructing execution of automatic inspection, a “defect confirmation” button 204 for designating a defect confirmation mode instructing defect confirmation, and a recipe for setting inspection conditions in advance A “recipe creation” button 205 for designating a recipe creation mode for instructing creation, a “utility” button 206 for designating a utility mode for instructing calling of auxiliary functions, and a “system end” button 207 for instructing system termination are arranged. Yes.

  A cassette display area 208 for displaying the position of the substrate mounted on the apparatus in the cassette is arranged on the left side of the center, and a substrate display area 209 for displaying data of the corresponding board is arranged on the right side of the center. When the operator selects to change the operating condition in the option area 210 in the substrate display area 209, an operating condition change box 211 is displayed, and the defect SEM image is automatically reacquired in the defect confirmation mode or manually. You can select whether to execute or not by clicking the mouse pointer.

  In the case of automatic, an image of the automatically selected defect portion is automatically acquired. In the case of manual operation, the defect confirmation after the completion of the inspection is performed manually, so that the instruction is waited upon completion of the inspection. In the case of none, it is designated when the defect is not checked after the inspection is completed, and is manually performed later.

  FIG. 9 is a screen view at the end of the automatic inspection in the inspection mode as in FIG. A wafer map 212 is arranged on the left side of the center, and an inspection result display area 213 is arranged on the right side of the center. If automatic is set under the optional operating conditions described with reference to FIG. 8, the screen waits for a preset time on this screen and switches to the defect confirmation screen. In the case of manual operation, the “defect confirmation” button 204 is clicked with the mouse.

  FIG. 10 is a screen diagram in the defect confirmation mode. In this screen, in the case of automatic, the defect information for the maximum number of cases is extracted from the defect data, and the defect information is displayed while sequentially taking images of the corresponding defects. The acquired image and information are output to a file as upper system data.

  In FIG. 10, a “defect confirmation” button 204 is displayed in a color-coded manner so as to be distinguished from others. On the right side of the center, an image display area 214 in which a defect reacquired image is displayed is arranged. A defect information display area 215 is arranged below the wafer map 212, and a defect ID, a defect cluster ID, a defect classification code, coordinates, a size, and the like are displayed. In FIG. 10, by clicking a defect-marked color-coded mark on the wafer map 212 with a mouse or inputting a defect ID, an SEM high-magnification image of the corresponding part is displayed in the image display area 214 on the right side.

  The defect confirmation screen can be displayed by selecting either an image taken with an optical microscope or an SEM image. In the case of the optical microscope, the “light microscope” button 216 is clicked, in the case of the low magnification of the SEM image, the “SEM low magnification” button 217 is clicked, and in the case of the high magnification, the “SEM high magnification” button 218 is clicked. As a result, a defect image is displayed at the same time next to the information on the defect area of the wafer being inspected, so that the cause of the defect can be easily predicted.

  The display of the wafer map 212 and the defect information display area 215 are linked, and the defect ID designated on the wafer map 212 is automatically displayed in the defect information display area 215. Conversely, if a defect ID is input in the defect information display area 215, the corresponding position on the wafer map 212 is marked and displayed. If the classification code of the corresponding defect is known, enter the classification code.

  Instead of displaying all the extracted defects, it is also possible to display only defects that satisfy an arbitrary condition. When the “display filter setting” button 219 is clicked, the display of defects can be limited. The conditions are, for example, the defect area, projection length, coordinates, classification code, range of coordinates in the chip, classification code, and the like.

  When the “sort” button 220 is clicked, for example, the defects can be rearranged in descending order of size or area, and a defect sort ID can be assigned as a sub ID in that order.

  When the “cluster classification” button 221 is clicked, defects are classified into clusters and the results are displayed and saved. In addition, a defective cluster ID can be assigned as a sub ID.

  Further, the SEM image can be adjusted and the defect can be observed with each button in the option area. When the “irradiation condition” button 222 is clicked, the screen shown in FIG. 11 is displayed on the screen shown in FIG. FIG. 11 is a screen view of the irradiation condition box. In the electron beam irradiation condition input area 223, an acceleration voltage and a beam current can be designated. In the signal acquisition input area 224, the signal addition number and the pixel size can be designated. Here, the signal addition number is the number of times the wafer is scanned with an electron beam. Here, the pixel size is the size of a pixel of an image created from a signal acquired by the secondary electron detector 20, that is, the length of one side. Pixels smaller than the electron beam diameter can also be selected. Therefore, even if the width of the circuit pattern is different on one chip, the pixel size can be designated according to the width of the circuit pattern, so that the inspection time can be made more efficient.

  FIG. 12 is a screen diagram in the utility mode. When the “utility” button 206 in FIG. 10 is clicked, the screen shown in FIG. 12 is displayed.

  In the file menu display area 225, file menus such as electro-optical adjustment, load / unload, file management, image management, time setting, etc. are prepared as utility functions. For example, when the “file management” button 226 is clicked, a file management display area 227 is displayed. In the file management display area 227, in addition to the display of the product file and the process file, the stored image file of the inspection result is displayed with a name. When the image of the inspection result is clicked and the “copy” button 228 is clicked, a copy display area 229 is displayed. In this copy display area 229, the destination of the designated image file can be designated. When the “PC input” mark 230 is designated, an image file from an external PC can be downloaded.

  According to the above embodiment, it is possible to extract a specific defect, and it is possible to reconfirm the defect based on reacquisition and display of the SEM image filed by the operator's judgment. Since the defect image is simultaneously displayed on the side adjacent to the defect area information of the wafer being inspected, it is easy to predict the cause of the defect. As a result, the screen function of the circuit pattern inspection apparatus for inspecting defects in circuit patterns such as wafers, masks, reticles, etc., that is, thinning, chipping, formation defects, foreign matter, etc., such as line shapes and hole shapes, has been improved. An easy-to-use circuit pattern inspection apparatus and inspection method can be obtained.

  In this way, chip inspection and wafer sampling frequency inspection can be performed quickly while looking at the screen, so that defects that cover the entire product or in specific areas can be detected quickly, and fluctuations in process conditions can be assured. It is possible to detect and feed back to the process, and at the same time, it is possible to feed back to the adjustment of the man-hours and payout budget.

  It is also possible to quickly detect inspection defects after fine pattern formation step / resist development, fine pattern formation step / etching, hole pattern formation step, and cleaning after cleaning.

  Next, an example of a system for collecting and analyzing data detected by the inspection apparatus will be described below. FIGS. 13 to 15 show examples of circuit pattern inspection systems for collecting and analyzing data.

  FIG. 13 is an overall process diagram showing a process for forming a semiconductor circuit pattern, an accompanying inspection process, and the purpose of the inspection, and the process flows from left to right in the figure. As shown in FIG. 7, in order to form a semiconductor pattern, “input” 71, “step 1” 72, “step 2”,..., “Step n”, and “complete (electrical test)” 73 steps Is assumed. In the “process 2” or “process 3”, a specific “apparatus 2” or “apparatus 3” may be used instead of the “apparatus 1”. An “inspection” 74 is performed between processes or every several processes. The “inspection” 74 is assumed to be “inspection process 1”, “inspection process 2”,..., “Inspection process n” corresponding to each process. With these inspections, regarding the number of defects such as foreign matter and pattern defects, “whether foreign matter / defects in a specific process have increased” 75, “correlation between yield (electrical test) and defects (control level setting) "76" is executed, and "Search by processing device history (is there any abnormality in the group that passed through a specific device?)" 77 is executed.

  FIG. 14 is a block diagram showing an overall system including various measuring devices, a data collection / analysis system, and a data transmission / storage device. The entire system 80 includes a measuring device group 81, a data collection and analysis system 82, a bus 83 as a communication line, a QC data collection system 84, a tester 85, a server 86, and an in-office personal computer 87.

  The measuring device group 81 includes, for example, a review SEM 91, a review station 92, a foreign matter inspection device 93, a semiconductor wafer appearance inspection device 94 using light or laser light, a length measurement SEM 95, a matching accuracy measurement device 96, and a film thickness measurement device. It consists of 97 others.

  The review SEM 91, the review station 92, the foreign matter inspection device 93, and the appearance inspection device 94 output foreign matter / appearance / classification results 98 and input the data collection / analysis system 82 via the bus 83. Other QC data 99 is output from the length measuring SEM 95, the alignment accuracy measuring device 96, and the film thickness measuring device 97, and is input to the QC data collecting system 84 via the bus 83 together with the tester result from the tester 85.

  The data collection / analysis system 82 includes a computer 101, a foreign object / appearance storage file 102 and an image file 103 associated therewith. The output data is stored in the server 86. The server stores data for a certain period. The QC data collection system 84 comprises a computer 104 and an FBM data file 105 for FBM (Fail Bit Map) analysis and a QC data file 106 for electrical testing.

  The server 86 stores “yield electrical test category processing device history size film thickness foreign matter (mirror surface) alignment accuracy pressure resistance foreign matter / appearance” 107 as data. The in-office personal computer 87 takes in data from the server 86 and is used for various searches, analysis, and report creation processing.

  FIG. 15 is a system configuration diagram showing a part of FIG. 14 in detail. When there is no inspection device in the manufacturing process of the semiconductor device, the electrical characteristics are inspected by the tester 85 when the semiconductor device is completed. If there is an abnormality, the cause of the abnormality will be investigated with each of the high-resolution SEM, AES analysis, and TEM observation devices of the system of “Necessary to cut out observation / analysis section” 111. In this case, it is not until the semiconductor device is completed that an abnormality is found, and then the cause is investigated. Therefore, it takes a long period of one to two months to investigate the cause and start countermeasures. On the other hand, in this embodiment, appropriate inspections are performed during each process, an abnormality is discovered at an early stage for each process, and countermeasures are started. Therefore, a great effect is achieved in improving the manufacturing yield of semiconductor devices. Bring.

  As for the foreign object / appearance inspection result 98a, measurement conditions, the number of foreign objects / defects, size, coordinates, and the like are input to the data collection and analysis system 82. From the QC data collection system 84, the yield and FBM coordinates are input to the data collection analysis system 82.

  Here, for example, the position of the foreign matter or defect of the foreign matter / appearance / classification result 98 detected by the appearance inspection apparatus 94 shown in FIG. 14, that is, the coordinates are searched for the foreign matter or defect in the review SEM 91 shown in FIG. This is very useful when processing an FIB cross section for observation with the SIM / SEM observation apparatus 91a. If there is a common coordinate or coordinate compatibility between both devices, the position of a foreign object or a defect can be easily found. In addition, it is also useful for searching for a position when the review SEM 91 or FIB cross-section processing is performed by marking the position indicating the position of the foreign matter or defect with the appearance inspection device 94 in a place where the position of the foreign matter or defect such as the vicinity is known. .

  As a result of using the review SEM91, if it is determined that the observation unit / analysis unit is required to be extracted 111, the detected high-resolution SEM, AES analysis, and TEM observation result together with the foreign object / defect coordinates, image / classification result / analysis result Is input to the data collection / analysis system 82, and the collected / analyzed data is fed back and used to determine whether the observation unit / analysis unit needs to be extracted.

  FIG. 16 is a system configuration diagram similar to FIG. 14 showing another example. The visual inspection device 94 shown in FIG. 14 is divided into an external visual inspection device 94a such as an optical inspection device and an SEM visual inspection device 94b used in the present invention. With this configuration, information from the external appearance inspection device 94a and information from the host system are input to the SEM appearance inspection device 94b, and the acquired external information and the result of the SEM appearance inspection device 94b are obtained. Both can be compared on the screen. As a result, defect information that was not found only by the external appearance inspection device 94a such as an optical inspection device or defect information that was not obvious only by the SEM appearance inspection device 94b is displayed on the screen or obtained from both sides. It is possible to expect a more accurate inspection of the circuit pattern by displaying the defect information superimposed on the screen. In such a case, it is possible to further visually identify the defect information obtained by which device by displaying the information by color or changing the shape for each information. It becomes easy.

  Also in this example, the coordinates of the external visual inspection device 94a such as an optical inspection device or the SEM visual inspection device 94b used in the present invention and the coordinates of the review SEM 91 are made common or coordinate conversion is easy. As a result, the position of a defect such as a foreign substance or a pattern defect in the review SEM 91 can be easily found. In addition, the external visual inspection device 94a such as an optical inspection device or the SEM visual inspection device 94b used in the present invention performs marking so that the position of a defect such as a foreign substance or a pattern defect can be recognized. The position of a defect such as a foreign substance or a pattern defect can be easily searched for with the SEM 91.

  FIG. 17 is a screen view of the inspection result displayed on the monitor 50 of the circuit pattern inspection apparatus 1. The number of defects 108 and the number of defective chips are displayed. By capturing defect information of an external device, it is possible to display the wafer map 109 with a change in color or shape.

  According to the present embodiment described above, by applying the inspection apparatus according to the present invention to a product process of a semiconductor device, a defect that cannot be detected by the prior art, that is, an abnormality such as a product apparatus or a condition is displayed on a screen. It can be discovered early and with high accuracy by referring to the screen formed by the means. And since it can analyze using a suitable apparatus in a high-order system, abnormality countermeasure processing can be quickly assigned to a semiconductor device manufacturing process, and as a result, the defect rate of a semiconductor device can be reduced and productivity can be increased. Moreover, since the occurrence of abnormality can be detected promptly, a large amount of defects can be prevented in advance. Further, as a result, the occurrence of defects itself can be reduced, so that the reliability of a semiconductor device or the like can be improved. Therefore, the development efficiency of new products and the like can be improved, and the manufacturing cost can be reduced. In addition, the waiting time of the product until the cause of the defect in the manufacturing process can be greatly shortened, and the time for detecting the occurrence of defects can be greatly shortened.

  In addition, by applying the inspection apparatus according to the present invention to a manufacturing process of a semiconductor device such as a semiconductor element, not only can defects be detected with high sensitivity, but also an inspection application process is set and an inspection condition is set using a wafer in the process. The setting efficiency when setting can be improved. As a result, there is no waiting time for the in-process wafer in the inspection process, and the occurrence of a serious abnormality can be detected at an early stage. Then, abnormality countermeasures can be taken early in the defect generation process, and the processing conditions can be optimized so that these defects do not occur.

  For example, when a defect or disconnection of a photoresist pattern is detected in the circuit pattern inspection process after the development process, it is estimated that the exposure conditions and focus conditions of the exposure apparatus in the photosensitive process before the development process are not optimal. Therefore, measures such as adjustment of the focus condition or exposure amount can be taken quickly.

  Also, by examining from the defect distribution whether or not the detected defect occurs in common between shots, the photomask and reticle defects used for pattern formation can be estimated, so photomask and reticle inspection And exchanges can be implemented promptly.

  Thus, by applying the circuit pattern inspection method and inspection apparatus according to the present invention to the manufacturing process of a substrate such as a semiconductor device, by carrying out the inspection process in the middle of the manufacturing process, various defects can be detected, The cause of abnormality in each manufacturing process can be quickly estimated from the content of the detected defect.

  As an application example of the inspection, the inspection can be applied by the method described below in the wafer production line.

  About how often wafers of multiple products and processes that need to be inspected are to be optimized while changing various process conditions in the development of semiconductor products, for example, inspection each time the conditions are changed It is desirable to do.

  On the other hand, when the process conditions are almost fixed, it is desirable to inspect several wafers of products and processes that need to be inspected per week and inspect when the process conditions are changed.

  Furthermore, in a production line in which the process is stable, it is possible to grasp the variation and level of the production process by performing an inspection of about “one sheet / week, product, process”. However, other wafer sampling inspections may be performed depending on the purpose.

  As described above, in the semiconductor device manufacturing process, by implementing the circuit pattern inspection apparatus according to the present invention in-line, fluctuations in various manufacturing conditions and occurrences of abnormalities can be detected within the actual inspection time. It is possible to prevent the occurrence of defects. Further, by applying the circuit pattern inspection apparatus according to the present invention, it becomes possible to determine the inspection condition of the wafer to be inspected efficiently and accurately in a short time. As a result, since a more accurate inspection can be applied, the occurrence of defects can be detected with high sensitivity. In addition, since the time for determining the inspection conditions can be greatly shortened, the waiting time of the product and the occupation time of the operator can be shortened. And since a defect can be detected earlier than the conventional inspection method and inspection apparatus, the productivity of the semiconductor device can be improved.

  In the circuit pattern inspection apparatus according to the present invention, the inspection results can be matched or correlation evaluation can be performed as necessary, and data can be searched from an individual terminal (such as a personal computer). Further, when a defect is detected, information on the occurrence location can be searched, various analyzes can be performed by the defect analysis apparatus, and the analysis result can be further stored as an analysis result.

  In addition, inspection apparatuses and analysis apparatuses other than those described in this embodiment can be connected to the data collection and analysis system, and it is assumed that the inspection apparatuses described in this embodiment are also connected.

  As described above, with respect to the configuration of the representative apparatus of the present invention and the circuit pattern inspection method, a method of acquiring an electron beam image at high speed by irradiating an electron beam and performing a comparative inspection, a specific inspection flow, and the operation of each unit, Flow for determining inspection conditions, operation screen and operation method of inspection and inspection condition setting, hierarchy of inspection condition setting screen, semiconductor device by performing circuit pattern inspection of the present invention, and other circuit board having circuit pattern Although some embodiments, such as a method for improving the productivity of the manufacturing process, have been described, an inspection method and an inspection apparatus that combine a plurality of features listed in the claims without departing from the scope of the present invention. Is possible.

The block diagram of the inspection apparatus of a circuit pattern. The main block diagram of an electron optical system and a secondary electron detection part. The graph which shows the influence on the contrast of electron beam irradiation conditions. The top view which shows the scanning direction of the primary electron beam on a to-be-inspected board | substrate. 6 is a flowchart showing a manufacturing process of a semiconductor device. Schematic of the circuit pattern formed on the semiconductor wafer in a manufacturing process. The flowchart which shows the execution procedure in defect confirmation mode. The screen figure at the time of the end of automatic inspection in inspection mode. The screen figure at the time of the end of automatic inspection in inspection mode. The screen figure in defect check mode. The screen figure of an irradiation condition box. The screen figure in utility mode. The whole process figure which shows the objective of a test | inspection process and a test | inspection. The block diagram which shows the whole system which consists of various measurement apparatuses, a data collection analysis system, and a data transmission and storage apparatus. The block diagram of the system which shows the one part detail of FIG. The block diagram of the system similar to FIG. 14 which shows another example. The screen figure of the inspection result displayed on the monitor of the inspection device of a circuit pattern.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Circuit pattern inspection apparatus, 2 ... Examination room, 3 ... Electron optical system, 4 ... Optical microscope part, 5 ... Image processing part, 6 ... Control part, 7 ... Secondary electron detection part, 8 ... Sample room, 9 ... Substrate to be inspected, 10 ... Electron gun, 15 ... Scanning deflector, 18 ... E-cross B deflector, 19 ... Primary electron beam, 20 ... Secondary electron detector, 30 ... Sample stage, 31 ... X stage, 32 ... Y stage, 33 ... rotary stage, 36 ... retarding power supply, 46 ... first image storage unit, 47 ... second image storage unit, 48 ... calculation unit, 49 ... defect determination unit, 50 ... monitor, 74 ... inspection, 80 ... Entire system, 81 ... Measuring device group, 82 ... Data collection and analysis system, 83 ... Bus, 84 ... QC data collection system, 85 ... Tester, 86 ... Server, 87 ... Office personal computer, 91 ... Review SEM, 92 ... Review Station, 93 ... Foreign object Inspection device, 94 ... Visual inspection device, 95 ... Side length SEM, 96 ... Alignment accuracy measurement device, 97 ... Film thickness measurement device, 101 ... Computer, 104 ... Computer, 108 ... Defect, 109 ... Wafer map, 204 ... "Defect “Confirm” button 211... Operation condition change box 212. Wafer map 214. Image display area 215 Defect information display area

Claims (9)

  In the circuit pattern inspection apparatus, comprising: an electron optical device that irradiates a plurality of regions on the surface of the substrate on which the circuit pattern is formed; and a monitor that detects and displays a defect of the circuit pattern by the irradiation. A circuit pattern inspection apparatus, wherein the monitor displays an image signal transmitted from another apparatus.   Means for irradiating a plurality of regions on the surface of the substrate formed of a plurality of lenses with a circuit pattern, a secondary signal detecting means for detecting a signal secondarily generated from the plurality of regions by the irradiation; An electron beam appearance comprising: an electron beam image forming unit that forms an electron beam image of the plurality of regions from the detected signal; an image storage unit that stores the electron beam image; and a display device that displays the electron beam image In a circuit pattern inspection system comprising an inspection device and an external appearance inspection device having a defect image storage means for storing a defect image of the circuit pattern, the display device of the electron beam appearance inspection device is a map display of the substrate A screen and an electron beam image display screen, and a defect image stored in the defect image storage unit of the external appearance inspection apparatus related to the electron beam image stored in the image storage unit. The inspection system of the circuit pattern and displaying at.   3. The display according to claim 2, wherein the defect display by the image stored in the image storage means for recording the electron beam image and the defect display by the image stored in the defect image storage means are identified and displayed by color. An inspection system for circuit patterns.   4. The circuit pattern inspection system according to claim 2, further comprising a classification file for classifying and storing both defects displayed on the screen.   The substrate is inspected at the end of a predetermined manufacturing process among a plurality of manufacturing processes of the substrate on which the circuit pattern is formed to extract defects or foreign matters, and the inspected substrate or the Observing the defect or foreign matter present in a part thereof, determining a defect in a specific process or an increase in foreign matter in the manufacturing process, the yield rate and the defect occurring in the final process of the manufacturing process, Or a circuit pattern inspection comprising a step of calculating a correlation with an increase rate of foreign matter and classifying the defect or the foreign matter based on the calculation result and the history of each processing apparatus in the manufacturing process Method.   The substrate is inspected at the end of a predetermined manufacturing process among a plurality of manufacturing processes of the substrate on which the circuit pattern is formed to extract defects or foreign matters, and the inspected substrate or the Observing the defect or foreign matter present in a part thereof, determining a defect in a specific process or an increase in foreign matter in the manufacturing process, the yield rate and the defect occurring in the final process of the manufacturing process, Or a circuit pattern inspection comprising a step of calculating a correlation with an increase rate of foreign matter and classifying the defect or the foreign matter based on the calculation result and the history of each processing apparatus in the manufacturing process system.   An irradiation device configured to irradiate a substrate with light, laser light, or charged particle beam, a detector that detects a signal generated from the substrate by the irradiation, and a signal detected by the detector A defect extraction device for extracting defects on the substrate; and at least one of performing inspection of the substrate and extracting defects at the end of a predetermined manufacturing step among a plurality of manufacturing steps for forming a circuit pattern on the substrate. And an irradiation device that irradiates the substrate with a charged particle beam, a detector that detects a signal generated from the substrate by the irradiation, and a signal detected by the detector And an image display device for displaying the image of the substrate, and at least one observation device for observing the substrate or a part thereof based on the inspection result of the inspection device. And at least one analysis device that is connected to the inspection device and analyzes the inspection result of the inspection device, and the analysis device determines an increase in defects or foreign matters in a specific step of the manufacturing process. And calculating the correlation between the yield rate occurring in the final step of the manufacturing process and the defect or the rate of increase of foreign matter, and the defect based on the calculation result and the history of each processing device in the manufacturing process, Or a circuit pattern inspection system characterized by classifying foreign matter.   An irradiation device configured to irradiate a substrate with light, laser light, or charged particle beam, a detector that detects a signal generated from the substrate by the irradiation, and a signal detected by the detector An inspection apparatus comprising a defect extraction device for extracting defects on the substrate, wherein the substrate is inspected and extracted at the end of a predetermined manufacturing step among a plurality of manufacturing steps for forming a circuit pattern on the substrate. And an irradiation device configured to irradiate the substrate with a charged particle beam, a detector that detects a signal generated from the substrate by the irradiation, and the substrate based on a signal detected by the detector And an image display device that displays the image of the image, and based on the inspection result of the inspection device, connects the observation device for observing the defect present on the substrate or part thereof Both of them include transmission means for sending the inspection result, and the coordinates of the substrate for inspection executed by the inspection apparatus and the coordinates of the substrate for observation executed by the observation apparatus or a part thereof are common. A circuit pattern inspection system characterized by being or having compatibility. An irradiation device configured to irradiate a substrate with light, laser light, or charged particle beam, a detector that detects a signal generated from the substrate by the irradiation, and a signal detected by the detector An inspection apparatus comprising a defect extraction device for extracting defects on the substrate, wherein the substrate is inspected and extracted at the end of a predetermined manufacturing step among a plurality of manufacturing steps for forming a circuit pattern on the substrate. And an irradiation device configured to irradiate the substrate with a charged particle beam, a detector that detects a signal generated from the substrate by the irradiation, and the substrate based on a signal detected by the detector And an image display device that displays the image of the image, and based on the inspection result of the inspection device, connects the observation device for observing the defect present on the substrate or a part thereof. Both are provided with a transmission means for sending the inspection result, and the position of the defect detected by the inspection apparatus during the observation performed by the observation apparatus is changed to a marking attached to a place where the position of the defect is known. A circuit pattern inspection system characterized by detecting based on the above.

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