JP3326929B2 - Manufacturing method of liquid crystal display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a liquid crystal display, and more particularly to an etching area for opening a contact hole and an etching method.

[0002]

2. Description of the Related Art Liquid crystal display devices have been improved in resolution and resolution year by year, and their production and market scale have been expanding. In liquid crystal display devices used in viewfinders and projectors, the panel size and the resolution have been increasing at the same time in order to reduce costs, and devices including thin film transistors have been miniaturized.
Multi-layering is progressing. FIG. 2 shows an example of the structure of such a high-definition device. In FIG. 2, a glass substrate 201
A semiconductor layer 202 is provided thereover and a gate insulating film 203 is provided. The gate electrode 204 is on the gate insulating film and also serves as a gate line. Reference numeral 205 denotes a first line which electrically insulates the source line or the lead line 207 of the source electrode from the gate line 204.
Is an interlayer insulating film. Reference numeral 208 denotes a second interlayer insulating film that insulates the source line 207 from the pixel electrode 210. The source electrode 207 is composed of the gate insulating film 203 and the first interlayer insulating film 20.
5, is connected to a source electrode formed in the semiconductor layer 202 through a first contact hole 207 opened. The pixel electrode 209 is electrically connected to a drain electrode formed in the semiconductor layer 202 through a second contact hole 209 opened in the gate insulating film 203, the first interlayer insulating film 205, and the second interlayer insulating film 208. Connected. In such a structure, the pixel electrode is electrically insulated from all other different wirings and electrodes, and the area can be maximized as long as insulation from adjacent pixel electrodes is ensured. That is, with such a structure, a bright liquid crystal display device having high definition and a large aperture ratio can be obtained.

[0003]

However, since the second contact hole 209 shown in FIG. 2 is opened in the three types of insulating films as described above, it is necessary to control the sectional shape of the contact hole. Becomes In addition, the demand for higher definition and higher aperture ratio of the liquid crystal display device necessitates miniaturization of each component of the element. That is, the miniaturization of the size of the contact hole and the above problem must be solved at the same time. It is important to control the cross-sectional shape and dimension of the contact hole in order to prevent disconnection of the wiring layer in that portion and to secure electrical conduction. For the miniaturization, it is necessary to control the cross-sectional shape and dimensions of the first contact hole as well. Although these problems are more severe in the second contact hole than in the first contact hole, they are interconnected and need to be solved at the same time from the viewpoint of the entire device manufacturing process.

[0004]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a plurality of gate lines, a plurality of source lines, and a plurality of thin film transistors formed at intersections thereof on an insulating substrate. A liquid crystal display device comprising, as constituent elements, a first contact hole in which a source electrode of a thin film transistor is connected to the source line, and a second contact hole in which a drain electrode of the thin film transistor is connected to a pixel electrode. In the etching step for forming the first contact hole, the first contact hole and the first dummy region are simultaneously etched, and in the etching step for forming the second contact hole, The second contact hole and the second dummy region are simultaneously etched.

[0005]

FIG. 3 shows an embodiment of the present invention. FIG.
FIG. 3 shows the structure of the first and second dummy regions corresponding to the above-described first and second contact holes and a manufacturing process including an etching process. 3, reference numeral 306 denotes a first dummy region corresponding to the first contact hole 206 shown in FIG. 2, and reference numeral 309 denotes a second dummy region corresponding to the second contact hole 209 shown in FIG. Area. In FIG. 3A, reference numeral 302 denotes a semiconductor layer formed in the first dummy region and formed simultaneously with the same material as the source region of the thin film transistor formed in the semiconductor layer, and 302 'denotes the second dummy region. This is a semiconductor layer formed in the region and formed simultaneously with the same material as the drain region of the thin film transistor formed in the semiconductor layer. In the figure, 302 and 302 'are not connected, but may be connected. Reference numeral 303 denotes a gate insulating film formed simultaneously with the same material as the gate insulating film (203 in FIG. 2) of the thin film transistor. The gate electrode (204 in FIG. 2) formed on the gate insulating film is not formed in the dummy region. The ion implantation for the source / drain regions of the thin film transistor is simultaneously performed on the dummy region. Reference numeral 305 is simultaneously formed of the same material as the first interlayer insulating film (205 in FIG. 2) for insulating the gate line and the source line. Reference numeral 306 denotes a first contact hole (FIG. 2) for connecting the source electrode and the source line of the thin film transistor.
206), and an opening is made simultaneously using the photoresist 310 as a mask. The etching is performed by reactive ion etching (hereinafter abbreviated as RIE). After the etching is completed, the photoresist 310 is removed.
A second interlayer insulating film 308 is formed as shown in FIG. Next, as shown in FIG. 3C, a photoresist 311 for opening a second contact hole is formed, and a second dummy region 309 is opened simultaneously with the second contact hole. Etching is performed by RIE. Next, the photoresist 311 is removed to form a pixel electrode.

The point of the present invention relates to a method for detecting the end point of RIE etching. As described above, the size of the first and second contact holes needs to be reduced to 3 to 2 μm □ or less in accordance with miniaturization of the device. On the other hand, since the detection of the etching end point by RIE is performed by detecting the emission spectrum of the reaction product during etching, a certain amount of the reaction product is required. However, when the area of the contact hole is reduced, the amount of the reaction product is reduced, and accordingly, the intensity of the target emission spectrum is reduced, and it becomes difficult to detect the end point of the etching. However, in the present invention, since the dummy region corresponding to the contact hole is provided, a sufficient intensity of the emission spectrum can be ensured, and therefore, the end point of the etching can be detected. Further, the first and second dummy regions can be set so as not to impair the effective area of the substrate for forming a panel, such as a region around the substrate.

The present invention relating to a method of setting the dummy area corresponding to the contact hole will be described with reference to FIG. In FIG. 1, 101 is an insulating substrate, 112 is a region to be a liquid crystal panel, 106 is the first dummy region corresponding to the first contact hole, and 108 is the first dummy region corresponding to the second contact hole. 2 is a dummy area. The first and second dummy regions also serve as dicing regions for panel cutting in a liquid crystal panel assembly process. In FIG. 1, the first dummy area 106 is a vertical dicing area, and the second dummy area 108 is a horizontal dicing area. No restrictions. As the desirable section, the areas of the first and second dummy regions are substantially the same,
In addition, the distribution is not biased when viewed from the whole substrate.
In FIG. 1, reference numeral 113 denotes a dead region which is not desirable for panel formation because scratches and the like are easily formed in a manufacturing process. This region can be used as the dummy region.

Next, a method of etching the contact hole according to the present invention will be described with reference to FIG. FIG. 4 shows a cross-sectional shape of the second contact hole. 401
Is an insulating substrate, 402 is a drain region of a thin film transistor, 403 is a gate insulating film, 405 is a first interlayer insulating film for insulating and separating a gate line and a source line, and 408 is a second interlayer insulating and separating a source line and a pixel electrode. The insulating film 411 is a photoresist for opening a second contact hole. In the etching of the contact hole, first, a part of the second interlayer insulating film 408 is etched with a buffered hydrofluoric acid solution to obtain a shape 409a. Next, the remaining portion of the second interlayer insulating film, the first interlayer insulating film 405, and the gate insulating film 402 are etched by RIE.

The point of the present invention shown in FIG.
The purpose of this is to make the shape of the contact hole shown in FIG. Usually, the gate insulating film is made of a dense film such as a thermal oxide film of silicon to improve the characteristics of the thin film transistor.
Therefore, the etching rate is slow. The first interlayer insulating film is a silicon oxide film formed by a CVD method or the like. However, the first interlayer insulating film is densified in order to receive heat treatment for activating impurities implanted for forming source / drain regions, and the etching rate is reduced. Slower than the gate insulating film. As the second interlayer insulating film, a silicon oxide film formed by a CVD method or the like is used on a source line usually formed of Al, and the etching rate is the fastest. The difference between the etching rates of these films is several to ten times. Thus the second
Therefore, it is difficult to simultaneously etch two or more layers while controlling the shapes of the three or more layers by wet etching. However, it is easy to partially open the second interlayer insulating film as the first layer by wet etching. Further, due to isotropic etching peculiar to wet etching, the shape becomes 409a in FIG. The remaining film thickness of the second interlayer insulating film has large variations between substrates and lots because the etching rate in wet etching is large. However, in the next RIE, the etching end point can be determined due to the dummy region according to the present invention. Therefore, even if the remaining film thickness differs between the substrates, a problem such as insufficient etching does not occur.

[0010]

As described above, according to the present invention, when a fine contact hole is opened in a multi-layer insulating film having a different etching rate, the cross section of the contact hole is prevented so that there is no disconnection of the wiring layer in the portion. The shape can be controlled, and the end point of the etching can be easily detected. If this effect is replaced with a liquid crystal display device, a liquid crystal display device with high definition and high aperture ratio can be realized.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a dummy area for detecting an etching end point according to the present invention.

FIG. 2 is a cross-sectional view of a conventional pixel thin film transistor.

FIG. 3 is a sectional view of a dummy region in an etching step according to the present invention.

FIG. 4 is a cross-sectional view of a dummy region in an etching process according to another embodiment of the present invention.

[Explanation of symbols]

101, 201, 301, 401 Insulating substrate 202, 302, 402 Semiconductor layer 203, 303, 403 Gate insulating film 204 Gate electrode 205, 305, 405, 208, 308, 408 Interlayer insulating film 310, 311, 411 Photoresist

Claims (10)

(57) [Claims] 1. A plurality of gate lines, a plurality of source lines, a plurality of thin film transistors formed corresponding to intersections thereof on an insulating substrate, and a source electrode of the thin film transistor is connected to the source lines. In a method for manufacturing a liquid crystal display device including a first contact hole and a second contact hole in which a drain electrode of the thin film transistor is connected to a pixel electrode, the first contact hole is formed. In the etching process for the first
And etching the contact hole and the first dummy region at the same time, and etching the second contact hole and the second dummy region at the same time in the etching step for forming the second contact hole. A method for manufacturing a liquid crystal display device. 2. The first contact hole and the second contact hole.
2. The method according to claim 1, wherein the contact holes are opened by different etching processes, and at least the etching for forming the first or second contact hole is performed by a method including a reactive ion etching method. The manufacturing method of the liquid crystal display of the description. 3. A sectional structure of the first dummy region and a sectional shape of the first contact hole, and a sectional structure of the second dummy region and a sectional shape of the second contact hole. 3. The method for manufacturing a liquid crystal display device according to claim 1, wherein 4. The total area of the first dummy region is larger than the total area of the first contact hole, and the total area of the second dummy region is larger than the total area of the second contact hole. 4. The method for manufacturing a liquid crystal display device according to claim 1, wherein: 5. The method according to claim 1, wherein the first and second dummy regions are different from each other. 6. The first and second dummy regions include:
6. The method according to claim 1, wherein at least a peripheral region of the panel, a dicing region for cutting the panel, or a peripheral region of the substrate is used, and the first and second dummy regions are different from each other. The manufacturing method of the liquid crystal display device according to the above. 7. The first contact hole is a contact hole that is simultaneously opened in a gate insulating film and a first interlayer insulating film that insulates and separates a gate line and a source line, and the second contact hole is a gate insulating film. 2. A contact hole which is simultaneously opened in a first interlayer insulating film for insulating and separating a film, a gate line and a source line, and a second interlayer insulating film for insulating and separating a source line and a pixel electrode.
The manufacturing method of the liquid crystal display device according to the above. 8. The first contact hole is a contact hole that is simultaneously opened in a gate insulating film and a first interlayer insulating film for insulating and separating a gate line and a source line, and the first contact hole. First, a part of the first interlayer insulating film is etched by wet etching, and then the remaining etching of the first interlayer insulating film and the gate insulating film are etched by reactive ion etching. The method for manufacturing a liquid crystal display device according to claim 1, wherein: 9. The second contact hole is simultaneously opened in a gate insulating film, a first interlayer insulating film for insulating and separating a gate line and a source line, and a second interlayer insulating film for insulating and separating a source line and a pixel electrode. The second contact hole is etched first by wet etching to partially etch the second interlayer insulating film, and then by reactive ion etching to etch the second contact hole. 2. The method for manufacturing a liquid crystal display device according to claim 1, wherein the remaining portion of the interlayer insulating film is etched and the first interlayer insulating film and the gate insulating film are etched. 10. The method of manufacturing a liquid crystal device according to claim 1, wherein an end point of etching is detected using the first dummy region and the second dummy region.