JPH02120926A - Data transfer processing system - Google Patents

Abstract

PURPOSE:To make processing highly efficient and to prevent the generation of command overrun by informing a data transfer end to an MPU at the time of obtaining two signals, a signal indicating no data transfer error and a signal indicating the end of data transfer. CONSTITUTION:At the time of ending data transfer without generating an error in data transfer from an optical channel, a data transfer end informing circuit 20 informs a data transfer end to a control part (MPU) 16. At the time of detecting the generation of an error in the data transfer from the optical channel 10, an error detecting circuit 22 informs the error generation to the MPU 16 without waiting the end of data transfer. Since it is unnecessary for the MPU 16 receiving the data transfer end information to decide whether a signal indicating error generation is generated or not, a time delay for the processing of the MPU 16 is not generated. Consequently, the generation of command overrun is prevented and a data transfer speed is improved.

Description

[Detailed Description of the Invention] [Summary] Regarding the data transfer processing method when transferring data from the optical channel device to the disk controller υIHA device described in A. The purpose is to improve processing efficiency and prevent command overruns from occurring, and data is transferred to the MPU when two or one signals are detected, one indicating that there is no data transfer error and the other indicating that the data transfer is complete. The configuration is such that when the end is notified and the occurrence of an error is detected during data transfer, the MPU is notified of the error occurrence without waiting for the end of data transfer.

[Industrial Application Field] The present invention relates to a data transfer processing method when data is transferred from a higher-level optical channel to a disk control device.

In recent years, with the development of computer systems, there has been a demand for improved data transfer speeds.

However, if an error occurs during data transfer, a data overrun may occur depending on the error handling method. Therefore, it is desirable to prevent the occurrence of data overruns, transfer data efficiently, and improve data transfer speed.

[Prior Art] Conventionally, when data is transferred from a higher-level optical channel bag to a disk control device, that is, when data is transferred to a disk control device,
When write data is transferred to the l device, when the disk occupation of the write data transferred from the optical channel is completed, the microprocessor (hereinafter referred to as rMPUJ) as a control device installed in the disk control device It is designed to notify the end of data transfer.

On the other hand, if an error occurs in the data transferred from the optical channel device to the disk device, Check 2 is sent to MP as a signal indicating that there was an error during data transfer.
Notifying U.

For such data transfer, the MPU installed in the disk control device determines whether or not the CheCk2 signal indicating the occurrence of an error during transfer has been generated after receiving the data transfer completion notification. I make sure to carry out the process.

[Problem to be solved by the invention] However, in the conventional data transfer processing method,
Regardless of whether or not an error occurred during data transfer and the Check2 signal was generated, when the data transfer end notification was received, the error occurred because the process to determine whether or not Check2 had occurred was performed. Even if there is no Ch
A certain amount of processing time is consumed in determining eck 2, and the MPU processing is delayed, which may lead to a command overrun in the worst case.

The present invention has been made in view of these conventional problems, and is a data transfer system that improves the efficiency of processing when data transfer is normally completed without an error, and prevents the occurrence of command overruns. The purpose is to provide a transfer processing method.

[Means for Solving the Problems] FIG. 1 is an explanatory diagram of the principle of the present invention, in which the configuration is shown in the figure (a>) and the processing content is shown in the figure (b).

In FIG. 1, the present invention first transfers data from a host device 12 to a disk control device 14 via an optical channel 10, writes it to an external recording medium (@Ki disk device), and transfers data from a host device 12 to a control unit (MPLJ ) 16 of the completion of data transfer and the occurrence of an error.

Regarding such a data transfer processing method, the present invention includes an automatic data transfer control section (DAT) 1B that controls data transfer between the optical channel 10 and the disk control device 4 in the disk-based WJ device 14; a data transfer completion notifying unit 20 that notifies the control unit (MPU) 16 of the completion of data transfer when the data transfer is completed without any errors occurring in the data transferred from the channel device; An error detecting section 22 is provided which, when detecting the occurrence of an error, notifies the control section (MPU) 16 of the occurrence of the error without waiting for the end of data transfer.

[Function] In the data transfer processing method of the present invention having such a configuration, processing is performed based on two signal conditions: a signal indicating that no error occurred during data transfer, and a signal indicating the end of data transfer. Since the MPU is notified of the completion of data transfer, the MPU that receives the notification of the completion of data transfer does not need to perform processing to determine whether a signal (Check2 signal) indicating the occurrence of an error has been generated, as in the conventional method. Without, M
Since there is no time delay in PLJ processing, command overruns and the like can be reliably prevented and data transfer speed can be improved.

On the other hand, if an error occurrence is detected during data transfer, the MPU is notified of the error occurrence without waiting for the end of the data transfer. MPU recovery processing can be sped up.

[Example] FIG. 2 is an overall configuration diagram showing the overall configuration of the present invention.

In FIG. 2, reference numeral 12a denotes a central processing unit as a host device, which issues various commands such as requests for data transfer to an external storage device (magnetic disk device) as an input/output device.

In this embodiment, the central processing unit 12 includes two optical channel devices (hereinafter simply referred to as "optical channels").
10-1.10-2 is installed and optical channel 10-
1. Magnetic disk control device 14- for each of 10-2
1.14-2 is connected, and the magnetic disk controller 14-
1.11-2 is a magnetic disk device 2 as an external storage device
41°24-2 is connected.

FIG. 3 is a diagram showing an embodiment configuration of an embodiment of the present invention. do.

In FIG. 3, at J-3, 16 is an MPU installed in the magnetic disk 1J control device, which controls the magnetic disk drives 1 to 1 based on commands from the upper central processing unit 12 to the magnetic disk drive 1 via an optical channel. Access or access from the higher-level central processing unit 12 - [Performs read access to read data from the resident disk device based on Micomant.

1B is an automatic data transfer control circuit (ΔDT), which controls pig transfer between the optical channel and the disk control head. That is, write data from the optical channel side is transferred to the device side, which is a magnetic disk device, and read data from the magnetic disk device, which is the device side, is transferred to the upper optical channel side.

Further, 20 is a data transfer completion notification circuit, which notifies the MPU 16 of the completion of data transfer when the data transfer from the optical channel is completed without generating an error.

Furthermore, an error detection circuit 22 notifies the MPU 16 of the error occurrence upon detecting the occurrence of an error during data transfer from the optical channel without waiting for the end of the data transfer.

The configurations of the data transfer end notification circuit 20 and error detection circuit 22 shown in FIG. 3 will be described in more detail as follows.

First, the data transfer end notification circuit 20 uses an AND gate 26
, JK, -FF 28, an OR gate 30, and an AND gate 32.

The AND gate 26 receives a signal @a indicating that data is being transferred from the optical channel, and a signal b (CR) indicating that there is no error in the data transferred from the optical channel.
In addition to the C-OK signal, a signal C from the automatic data transfer control circuit 20 indicating that the data transfer from the disk-based vJ11 device to the disk device has been completed is input. Therefore, when the three signals a, b, and c become "1", the AND gate 26 immediately becomes "signal a or 11", indicating that data is being transferred from high 1 to jT'3. , Signal Sky 1
1" indicating that there are no errors in the data transferred from the optical channel, and then a C signal []" indicating that the data transfer from the head of the magnetic disk device to the magnetic disk device has been completed. AND goo 1 when
~26 outputs "1".

The output of the AND gate 26 is connected to the J terminal of JK-F 28, while the C signal from the automatic data transfer control circuit 20 is input to the terminal. Therefore, the output of the AND gate 26 is "1". When this occurs, JK-FF28
~ and the Q output becomes "1". The Q output of the JK-FF 28 is given to the MPU 16 as a data transfer end notification signal A via an OR gate 30.

On the other hand, a signal d indicating that read data is being transferred and a signal C from the automatic data transfer control circuit 20 are input to the AND gate 32, and the read data is transferred from the device side to the optical channel side. When the process is completed, the C signal from the automatic data transfer control circuit 20 becomes "1" and the A
The output of the ND gate 32 becomes "1", so that the completion of read data transfer can be notified to the MPU 16 via the OR gate 30 even during automatic data reading.

On the other hand, the error detection circuit 22 is composed of AND gates 1 to 34, an error register 36, and an OR gate 38.

A signal a indicating that write data is being transferred from the optical chisennel is input to one side of the AND gate 34, and the a signal is "1" during data transfer. A signal e indicating that there is an error in the data transferred from the optical channel is input to the other input of the AND gate 34, and if there is an error in the transferred data, the signal e (CRC-ERR signal) becomes "1". As a result, the output of the AND gate 34 is "1"
becomes. The output of AND gate 34 is sent to error register 36.
It is maintained that a transfer error occurred during the transfer of the light button from the optical channel. The output of the error register 36 is sent to the OR game 1 via the MPU 38.
16 as an error occurrence notification signal B.

In the error detection circuit 22, as will be explained later, the write data from the optical channel is transferred with a fixed byte length, and a predetermined fixed byte length is set to 1.
Since a plurality of frames of data are transferred as a frame, an AND gate 34 is provided for each transfer frame, and an error register 34 detects whether or not an error has occurred for each frame.
6 and OR the contents of the error register 36.
The error occurrence detection signal B is taken out by the gate 38 and notified to the MPU 16.

Next, refer to the write data transfer explanatory diagram in FIG.
The operation of the illustrated embodiment will be explained.

First, in the embodiment of the present invention, data transferred from the optical channel to the disk controller is transferred in a fixed byte length. This transfer data has a fixed byte length as one frame, and the first two bytes of one frame store a frame header (FH), and the last two bytes contain a CRC for identifying transfer errors. , during which data is set and transferred.

In addition, if no errors occur in the data transferred in units of one frame, a notification is sent from the CRC-OK double signal optical channel after the data transfer of one frame is completed, as shown in Figure 4(a). Ru.

On the other hand, if a transfer error occurs, as shown in Figure 4(b), instead of a CRC-〇 signal, a CRC-E rro signal is sent from the optical channel after one frame of data has been transferred.
r signal is notified.

Therefore, the operation when there is no error in the write transfer data from the optical channel shown in FIG. 4(a) will be described.

If there is no error in the transferred write data from the optical channel, the b signal to the AND gate 26 provided in the data transfer end notification circuit 20 in FIG. 3, that is, the CRC-OK multiplied signal "1" shown in FIG. ", and at this time, the a signal indicating that write data is being transferred is "1", and when the automatic data transfer control circuit 18 completes the transfer of write data to the magnetic disk device, the C signal becomes "1". The output of AND gate 26 becomes "1", and JK
-FF28 is set to produce an output of Q=1, and O
A data transfer end notification signal A is given to the MPU 16 via the R gate 30. This data transfer completion notification signal is given based on the conditions for the establishment of two signals: a signal indicating that there is no error in the transferred data, and a signal @C indicating the completion of data transfer by the automatic data transfer control circuit 20. Therefore, the MPU 16 performs a signal check indicating the presence or absence of a transfer error of write data from the optical channel, that is, Che
The process of checking the presence or absence of the ck2 signal is no longer necessary,
Processing delays in the MPU 16 are prevented.

On the other hand, during data transfer from the optical channel, e.g.
As shown in Figure (b), when an error occurs in a specific transfer frame, the AND gate 3 provided in the error detection circuit 22
The C signal for 4, that is, the CRC-E error signal is “
1”, indicating that data is being transferred at this time.
Since the signal is "1", the output of the AND gate 34 becomes "1", the error occurrence is stored in the error register 36, and the signal is immediately sent to the MPU 1 via the OR gate 38.
6, a %0 signal B is output indicating that an error has occurred.

Here, after the error detection circuit 22 outputs the error occurrence notification signal B to the MPLJ 16, the data transfer completion notification signal A to the MPU 16 is output as shown in FIG. If no error occurs in the next frame following the frame, the next normal data transfer is performed in the same manner as in the case of FIG. The notification signal Δ is supplied, and the MPU 16 receives the data transfer end notification signal A with a one-frame delay and executes recovery processing and the like for the error occurrence notification signal port.

[Effects of the Invention] As explained above, according to the present invention, there is no error in the transferred data, and when the two conditions (1) for completing the data transfer are obtained, the data is transferred to the M P LJ of the disk control device. By notifying the end of the data transfer, it is possible to avoid processing delays by checking whether an error has occurred after receiving the data transfer end notification, and to prevent the occurrence of command overrun errors caused by processing delays. This can greatly contribute to improving data transfer speeds.

[Brief explanation of the drawing]

Fig. 1 is a diagram explaining the principle of the present invention: Fig. 2 is an overall block diagram of the present invention: Fig. 3 is a block diagram of an embodiment of the present invention: Fig. 4 is a time diagram of the write data transfer operation of the present invention.
1 must have 1C. In the figure, 10. ] 2: 14: 16: 10-1. ) 18: Automatic data transfer control unit or circuit (ADH>20:
Data transfer end notification λU section or circuit 22: Error detection section or circuit 241, 21-2: Magnetic disk device 26, 32.34: △ND gate 28: JK-FF 30, 38: OR gate 36: Error register

Claims (1)

[Claims] Data from a host device (12) is transferred to a disk control device (14) via an optical channel (10), written to an external recording medium, and transferred to a control section (16) in the disk device (14). In the data transfer processing method for notifying the end of data transfer and the occurrence of an error, the disk control device (14) includes automatic data transfer control for controlling data transfer between the optical channel (10) and the disk device (14). unit (18); when the data transfer is completed without an error occurring in the transferred data from the optical channel (10), the control unit (18);
a data transfer end notification unit (20) for notifying the data transfer end to the optical channel (16); when an error occurrence is detected during data transfer from the optical channel (10), the control unit (16) notifies the control unit (16) of the end of the data transfer; ) to notify the error detection section (2) of the occurrence of an error.
2) and: A data transfer processing method characterized by providing the following.