JPS59162695A - Storage device - Google Patents
Storage deviceInfo
- Publication number
- JPS59162695A JPS59162695A JP58036964A JP3696483A JPS59162695A JP S59162695 A JPS59162695 A JP S59162695A JP 58036964 A JP58036964 A JP 58036964A JP 3696483 A JP3696483 A JP 3696483A JP S59162695 A JPS59162695 A JP S59162695A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- writing
- frequency
- writes
- nonvolatile
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
Landscapes
- Read Only Memory (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
Abstract
PURPOSE:To secure the reliability of storage contents easily by controlling the frequency of writing to a nonvolatile memory. CONSTITUTION:A microprocessor is connected to a nonvolatile and electrically erasable programmable ROM (EEPROM)2 and an RAM3. The processor 1 writes the frequency of writing up to now in a specific address (03FF) of the memory 2 prior to writing to the memory 2. The processor 1 reads the frequency COUNT of writing by a write enable signal WE to the memory 2 before writing data in the memory 2; when the frequency does not exceed a secured frequency N of writing, the value COUNT is increased by one to perform the writing to the memory 2, and when so, data to be written in the memory 2 is saved on an external storage device such as a floppy disk to let an operator know that the memory 2 should be replaced.
Description
【発明の詳細な説明】
本発明は、不揮発性の半導体メモリをもつ記憶装置に関
する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a storage device having a nonvolatile semiconductor memory.
電気的に読出しおよび書込みが可能で電源を切断しても
、その内容が保持されるこの種の不揮発性半導体メモリ
への書込み可能回数は１０’〜１０’回程度である。と
ころが従来の紫外線消去方式とは異なり電気的に消去が
可能であるのでメモリ内容の書換えは装置に実装され電
源を入れたまま行うことができるようになり、その結果
として書換えが頻繁に行われるメモリとして使用される
よってなってきた。This type of nonvolatile semiconductor memory, which can be electrically read and written and whose contents are retained even when the power is turned off, can be written to about 10' to 10' times. However, unlike the conventional ultraviolet erasing method, it is possible to erase electrically, so the memory contents can be rewritten while the device is mounted and the power is turned on.As a result, memory that is frequently rewritten It has come to be used as a.
このようなアプリケーションにお（・では、書込まれた
情報が正しく記憶されて（・るか常にＷ認し、その内容
を保証する必要がある。In such an application, it is necessary to always confirm whether the written information is stored correctly and to guarantee its contents.
従って本発明の目的は、不揮発性メモリの書込み回数の
管理を行なうことによって、記憶内容の信頼性の４８−
証を簡便に実施するでとのできる記憶装置を提供するこ
とにある。Therefore, an object of the present invention is to improve the reliability of stored contents by managing the number of writes to nonvolatile memory.
An object of the present invention is to provide a storage device that allows easy verification.
本発明によれば、電気的に消去及び書込みが可能な不揮
発性メモリの特定番地にその時点までの書込み回数を記
憶させ書込みを行うたびに、凋込み回数を確？すること
を特徴とする記憶装置が得られる。According to the present invention, the number of writes up to that point is stored in a specific address of a non-volatile memory that can be electrically erased and written, and the number of declines is checked every time a write is performed. A storage device characterized by the following is obtained.
次に本発明の実施例につ（・て図面を参照して本発明の
詳細な説明する。Next, embodiments of the present invention will be described in detail with reference to the drawings.
第１図は、本発明の一実施例の構成をブロック図で示し
たものであり、マイクロプロセッサはパスを介して不揮
発性で雷側的に消去可能なプログラマブル・リード参オ
ンリー・メモリ（ＥＥＰＲＯＭ）２と、ランダム・アク
セス・メモリ（ＲＡＭ）３とに接続されて（・る。FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, in which a microprocessor is connected to a non-volatile and erasable programmable read-only memory (EEPROM) via a path. 2 and a random access memory (RAM) 3.
マイクロプロセッサ１は、メモリ２に書込みを行なう前
に、第２図に示すようにメモリ２の特定番地（０３ＦＦ
）に、現時点までの書込み回数を書込んでおき、第３図
に示す流れ図に基づ（・て、保証された書込み回数内で
あるかを確認してから、書込みの実行を行う。Before writing to memory 2, microprocessor 1 writes data to a specific address (03FF) in memory 2, as shown in FIG.
), write the number of writes up to the present time, check whether the number of writes is within the guaranteed number of writes based on the flowchart shown in FIG. 3, and then execute the write.
第３図において、Ｎは保証された書込み回数であり、Ｃ
０ＵＮＴは現時点までにメモリ２に書込んだ回数である
。プロセッサ１はメモリ２にデータを書込む前にメモリ
２への書込みイネーブル信号ＷＥによって書込み回数Ｃ
０ＵＮＴを読込み、保証された書込み回数Ｎを越えてな
ければ、Ｃ０ＵＮＴＯ値に１を加えて、メモリ２への書
込みを実行し、越えていればメモリ２に書込もうとした
データを７０ツピーデイスク等の外部記憶装置に退避し
ておき、メモリ２の交換をオペレーターに知らせる。In FIG. 3, N is the guaranteed number of writes, and C
0UNT is the number of times data has been written to the memory 2 up to this point. Before writing data to the memory 2, the processor 1 sets the number of writes C by the write enable signal WE to the memory 2.
Reads 0UNT, and if the guaranteed number of writes N has not been exceeded, adds 1 to the C0UNTO value and executes writing to memory 2. If it has exceeded the guaranteed number of writes, N, the data to be written to memory 2 is transferred to a 70-tuppy disk. etc., and notify the operator of the memory 2 replacement.
また第４図のように、公知の方法であるＬＲＣ（Ｌｏｇ
ｉｔｕｄｉａｌ Ｒｅｄｕｎｄａｎｃｙ Ｃｈｅｃｋ）
のためのエリアを確保しておくことによってＩ、ＲＣに
よる不揮発性メモリ２のチェックもできる。In addition, as shown in FIG. 4, LRC (Log
(Itudial Redundancy Check)
By securing an area for this, it is also possible to check the nonvolatile memory 2 using I and RC.
以上のように、メモリ自身の不揮発性を利用し、保証さ
れた書込み回数内で使用することを管理する機能を設け
ることによって不揮発性メモリの使用上の信頼性を簡便
に保証することができる。As described above, by utilizing the non-volatility of the memory itself and providing a function to manage use within the guaranteed number of writes, the reliability of non-volatile memory in use can be easily guaranteed.
本発明は以上説明したように、電気的に消去及び書込み
が可能な不揮発性メモリの特定番地に書込み回数を記憶
しておくことにより、保証された書込み回数内で使用す
るととを管理することができ、使用上の信頼性を極めて
簡増な方法で保証す２）効果がある。As explained above, the present invention stores the number of writes in a specific address of a non-volatile memory that can be electrically erased and written, thereby managing whether the memory is used within the guaranteed number of writes. 2) It is effective in ensuring reliability in use in an extremely simple manner.
第１図は、本発明の一実施例のブロック図、第２図は不
揮発性メモリのメモリエリアを示す図、第３図は、不揮
発性メモリの再込み時の制御を示す流れ図、第４図は不
揮発性メモリの特定番地を第１図
（イ）３図
（書込み信号）
〔書込＃定材１
第４図FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a diagram showing a memory area of a nonvolatile memory, FIG. 3 is a flowchart showing control when reloading the nonvolatile memory, and FIG. 4 is a diagram showing a memory area of a nonvolatile memory. shows the specific address of the non-volatile memory in Figure 1 (A) Figure 3 (Write signal) [Write # Fixed material 1 Figure 4
Claims (1)
くエリアを設けたことを特徴とする記憶装置。A storage device characterized in that an area for storing the number of writes is provided at a specific address of a non-volatile memory.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58036964A JPS59162695A (en) | 1983-03-07 | 1983-03-07 | Storage device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58036964A JPS59162695A (en) | 1983-03-07 | 1983-03-07 | Storage device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59162695A true JPS59162695A (en) | 1984-09-13 |
Family
ID=12484411
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58036964A Pending JPS59162695A (en) | 1983-03-07 | 1983-03-07 | Storage device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59162695A (en) |
Cited By (42)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62145600A (en) * | 1985-12-20 | 1987-06-29 | Fujitsu Ltd | Memory device |
| US5268870A (en) * | 1988-06-08 | 1993-12-07 | Eliyahou Harari | Flash EEPROM system and intelligent programming and erasing methods therefor |
| EP0667620A2 (en) * | 1994-02-15 | 1995-08-16 | Matsushita Electric Industrial Co., Ltd. | Semiconductor memory device |
| EP0685852A3 (en) * | 1988-06-08 | 1996-02-14 | Eliyahou Harari | Memory system and method of using same. |
| US5530827A (en) * | 1991-11-28 | 1996-06-25 | Fujitsu Limited | Data management system for programming-limited type semiconductor memory and IC memory card employing data save/erase process with flag assignment |
| US5544119A (en) * | 1992-10-30 | 1996-08-06 | Intel Corporation | Method for assuring that an erase process for a memory array has been properly completed |
| US5544356A (en) * | 1990-12-31 | 1996-08-06 | Intel Corporation | Block-erasable non-volatile semiconductor memory which tracks and stores the total number of write/erase cycles for each block |
| US5602987A (en) * | 1989-04-13 | 1997-02-11 | Sandisk Corporation | Flash EEprom system |
| US5630093A (en) * | 1990-12-31 | 1997-05-13 | Intel Corporation | Disk emulation for a non-volatile semiconductor memory utilizing a mapping table |
| US5765175A (en) * | 1994-08-26 | 1998-06-09 | Intel Corporation | System and method for removing deleted entries in file systems based on write-once or erase-slowly media |
| US5809556A (en) * | 1992-05-15 | 1998-09-15 | Toshiba Corporation | Data storage system for highly frequent repetitive data writing |
| US5838614A (en) * | 1995-07-31 | 1998-11-17 | Lexar Microsystems, Inc. | Identification and verification of a sector within a block of mass storage flash memory |
| US5907856A (en) * | 1995-07-31 | 1999-05-25 | Lexar Media, Inc. | Moving sectors within a block of information in a flash memory mass storage architecture |
| US5930815A (en) * | 1995-07-31 | 1999-07-27 | Lexar Media, Inc. | Moving sequential sectors within a block of information in a flash memory mass storage architecture |
| US5928370A (en) * | 1997-02-05 | 1999-07-27 | Lexar Media, Inc. | Method and apparatus for verifying erasure of memory blocks within a non-volatile memory structure |
| US5963480A (en) * | 1988-06-08 | 1999-10-05 | Harari; Eliyahou | Highly compact EPROM and flash EEPROM devices |
| US6034897A (en) * | 1999-04-01 | 2000-03-07 | Lexar Media, Inc. | Space management for managing high capacity nonvolatile memory |
| US6076137A (en) * | 1997-12-11 | 2000-06-13 | Lexar Media, Inc. | Method and apparatus for storing location identification information within non-volatile memory devices |
| US6081878A (en) * | 1997-03-31 | 2000-06-27 | Lexar Media, Inc. | Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
| US6081447A (en) * | 1991-09-13 | 2000-06-27 | Western Digital Corporation | Wear leveling techniques for flash EEPROM systems |
| US6115785A (en) * | 1995-07-31 | 2000-09-05 | Lexar Media, Inc. | Direct logical block addressing flash memory mass storage architecture |
| US6122195A (en) * | 1997-03-31 | 2000-09-19 | Lexar Media, Inc. | Method and apparatus for decreasing block write operation times performed on nonvolatile memory |
| US6141249A (en) * | 1999-04-01 | 2000-10-31 | Lexar Media, Inc. | Organization of blocks within a nonvolatile memory unit to effectively decrease sector write operation time |
| US6262918B1 (en) | 1999-04-01 | 2001-07-17 | Lexar Media, Inc. | Space management for managing high capacity nonvolatile memory |
| EP1168815A2 (en) * | 1994-02-23 | 2002-01-02 | Canon Kabushiki Kaisha | Data processing apparatus using recording medium which needs data erasing processing before recording of data |
| US6374337B1 (en) | 1998-11-17 | 2002-04-16 | Lexar Media, Inc. | Data pipelining method and apparatus for memory control circuit |
| US6411546B1 (en) | 1997-03-31 | 2002-06-25 | Lexar Media, Inc. | Nonvolatile memory using flexible erasing methods and method and system for using same |
| US6462992B2 (en) | 1989-04-13 | 2002-10-08 | Sandisk Corporation | Flash EEprom system |
| US6567307B1 (en) | 2000-07-21 | 2003-05-20 | Lexar Media, Inc. | Block management for mass storage |
| US6728851B1 (en) | 1995-07-31 | 2004-04-27 | Lexar Media, Inc. | Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
| US6750908B1 (en) | 1994-02-03 | 2004-06-15 | Canon Kabushiki Kaisha | Image processing apparatus using recording medium which needs data erasing processing before recording of data |
| US6757800B1 (en) | 1995-07-31 | 2004-06-29 | Lexar Media, Inc. | Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
| US6801979B1 (en) | 1995-07-31 | 2004-10-05 | Lexar Media, Inc. | Method and apparatus for memory control circuit |
| US6813678B1 (en) | 1998-01-22 | 2004-11-02 | Lexar Media, Inc. | Flash memory system |
| US6898662B2 (en) | 2001-09-28 | 2005-05-24 | Lexar Media, Inc. | Memory system sectors |
| JP2006085868A (en) * | 2004-09-17 | 2006-03-30 | Fujitsu Ltd | Rewrite limiting method and semiconductor device |
| US7120729B2 (en) | 2002-10-28 | 2006-10-10 | Sandisk Corporation | Automated wear leveling in non-volatile storage systems |
| US7492660B2 (en) | 1989-04-13 | 2009-02-17 | Sandisk Corporation | Flash EEprom system |
| US8694722B2 (en) | 2001-09-28 | 2014-04-08 | Micron Technology, Inc. | Memory systems |
| US9032134B2 (en) | 2001-09-28 | 2015-05-12 | Micron Technology, Inc. | Methods of operating a memory system that include outputting a data pattern from a sector allocation table to a host if a logical sector is indicated as being erased |
| US9213606B2 (en) | 2002-02-22 | 2015-12-15 | Micron Technology, Inc. | Image rescue |
| US9576154B2 (en) | 2004-04-30 | 2017-02-21 | Micron Technology, Inc. | Methods of operating storage systems including using a key to determine whether a password can be changed |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57135498A (en) * | 1981-02-16 | 1982-08-21 | Nec Corp | Semiconductor memory |
-
1983
- 1983-03-07 JP JP58036964A patent/JPS59162695A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57135498A (en) * | 1981-02-16 | 1982-08-21 | Nec Corp | Semiconductor memory |
Cited By (77)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62145600A (en) * | 1985-12-20 | 1987-06-29 | Fujitsu Ltd | Memory device |
| US5835415A (en) * | 1988-06-08 | 1998-11-10 | Harari; Eliyahou | Flash EEPROM memory systems and methods of using them |
| US5642312A (en) * | 1988-06-08 | 1997-06-24 | Harari; Eliyahou | Flash EEPROM system cell array with more than two storage states per memory cell |
| US5268870A (en) * | 1988-06-08 | 1993-12-07 | Eliyahou Harari | Flash EEPROM system and intelligent programming and erasing methods therefor |
| US5434825A (en) * | 1988-06-08 | 1995-07-18 | Harari; Eliyahou | Flash EEPROM system cell array with more than two storage states per memory cell |
| EP0685852A3 (en) * | 1988-06-08 | 1996-02-14 | Eliyahou Harari | Memory system and method of using same. |
| US5963480A (en) * | 1988-06-08 | 1999-10-05 | Harari; Eliyahou | Highly compact EPROM and flash EEPROM devices |
| US5909390A (en) * | 1988-06-08 | 1999-06-01 | Harari; Eliyahou | Techniques of programming and erasing an array of multi-state flash EEPROM cells including comparing the states of the cells to desired values |
| US5862081A (en) * | 1988-06-08 | 1999-01-19 | Harari; Eliyahou | Multi-state flash EEPROM system with defect management including an error correction scheme |
| US5544118A (en) * | 1988-06-08 | 1996-08-06 | Harari; Eliyahou | Flash EEPROM system cell array with defect management including an error correction scheme |
| US5568439A (en) * | 1988-06-08 | 1996-10-22 | Harari; Eliyahou | Flash EEPROM system which maintains individual memory block cycle counts |
| US5583812A (en) * | 1988-06-08 | 1996-12-10 | Harari; Eliyahou | Flash EEPROM system cell array with more than two storage states per memory cell |
| US5712819A (en) * | 1988-06-08 | 1998-01-27 | Harari; Eliyahou | Flash EEPROM system with storage of sector characteristic information within the sector |
| US5999446A (en) * | 1989-04-13 | 1999-12-07 | Sandisk Corporation | Multi-state flash EEprom system with selective multi-sector erase |
| US7460399B1 (en) | 1989-04-13 | 2008-12-02 | Sandisk Corporation | Flash EEprom system |
| US5602987A (en) * | 1989-04-13 | 1997-02-11 | Sandisk Corporation | Flash EEprom system |
| US5719808A (en) * | 1989-04-13 | 1998-02-17 | Sandisk Corporation | Flash EEPROM system |
| US5936971A (en) * | 1989-04-13 | 1999-08-10 | Sandisk Corporation | Multi-state flash EEprom system with cache memory |
| US6462992B2 (en) | 1989-04-13 | 2002-10-08 | Sandisk Corporation | Flash EEprom system |
| US8040727B1 (en) | 1989-04-13 | 2011-10-18 | Sandisk Corporation | Flash EEprom system with overhead data stored in user data sectors |
| US7492660B2 (en) | 1989-04-13 | 2009-02-17 | Sandisk Corporation | Flash EEprom system |
| US5592669A (en) * | 1990-12-31 | 1997-01-07 | Intel Corporation | File structure for a non-volatile block-erasable semiconductor flash memory |
| US5630093A (en) * | 1990-12-31 | 1997-05-13 | Intel Corporation | Disk emulation for a non-volatile semiconductor memory utilizing a mapping table |
| US5544356A (en) * | 1990-12-31 | 1996-08-06 | Intel Corporation | Block-erasable non-volatile semiconductor memory which tracks and stores the total number of write/erase cycles for each block |
| US7353325B2 (en) | 1991-09-13 | 2008-04-01 | Sandisk Corporation | Wear leveling techniques for flash EEPROM systems |
| US6081447A (en) * | 1991-09-13 | 2000-06-27 | Western Digital Corporation | Wear leveling techniques for flash EEPROM systems |
| US6594183B1 (en) | 1991-09-13 | 2003-07-15 | Sandisk Corporation | Wear leveling techniques for flash EEPROM systems |
| US6230233B1 (en) | 1991-09-13 | 2001-05-08 | Sandisk Corporation | Wear leveling techniques for flash EEPROM systems |
| US6850443B2 (en) | 1991-09-13 | 2005-02-01 | Sandisk Corporation | Wear leveling techniques for flash EEPROM systems |
| US5530827A (en) * | 1991-11-28 | 1996-06-25 | Fujitsu Limited | Data management system for programming-limited type semiconductor memory and IC memory card employing data save/erase process with flag assignment |
| US5809556A (en) * | 1992-05-15 | 1998-09-15 | Toshiba Corporation | Data storage system for highly frequent repetitive data writing |
| US5544119A (en) * | 1992-10-30 | 1996-08-06 | Intel Corporation | Method for assuring that an erase process for a memory array has been properly completed |
| US6750908B1 (en) | 1994-02-03 | 2004-06-15 | Canon Kabushiki Kaisha | Image processing apparatus using recording medium which needs data erasing processing before recording of data |
| EP0667620A2 (en) * | 1994-02-15 | 1995-08-16 | Matsushita Electric Industrial Co., Ltd. | Semiconductor memory device |
| EP0667620A3 (en) * | 1994-02-15 | 1996-02-07 | Matsushita Electric Ind Co Ltd | Semiconductor memory device. |
| CN1096680C (en) * | 1994-02-15 | 2002-12-18 | 松下电器产业株式会社 | Semiconductor memory device |
| EP1761032A1 (en) * | 1994-02-23 | 2007-03-07 | Canon Kabushiki Kaisha | Recording unit with detection of durability of recording medium |
| EP1168815A3 (en) * | 1994-02-23 | 2002-11-06 | Canon Kabushiki Kaisha | Data processing apparatus using recording medium which needs data erasing processing before recording of data |
| EP1168815A2 (en) * | 1994-02-23 | 2002-01-02 | Canon Kabushiki Kaisha | Data processing apparatus using recording medium which needs data erasing processing before recording of data |
| US5765175A (en) * | 1994-08-26 | 1998-06-09 | Intel Corporation | System and method for removing deleted entries in file systems based on write-once or erase-slowly media |
| US6757800B1 (en) | 1995-07-31 | 2004-06-29 | Lexar Media, Inc. | Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
| US6128695A (en) * | 1995-07-31 | 2000-10-03 | Lexar Media, Inc. | Identification and verification of a sector within a block of mass storage flash memory |
| US6172906B1 (en) | 1995-07-31 | 2001-01-09 | Lexar Media, Inc. | Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
| US9026721B2 (en) | 1995-07-31 | 2015-05-05 | Micron Technology, Inc. | Managing defective areas of memory |
| US6223308B1 (en) | 1995-07-31 | 2001-04-24 | Lexar Media, Inc. | Identification and verification of a sector within a block of mass STO rage flash memory |
| US6145051A (en) * | 1995-07-31 | 2000-11-07 | Lexar Media, Inc. | Moving sectors within a block of information in a flash memory mass storage architecture |
| US5838614A (en) * | 1995-07-31 | 1998-11-17 | Lexar Microsystems, Inc. | Identification and verification of a sector within a block of mass storage flash memory |
| US6393513B2 (en) | 1995-07-31 | 2002-05-21 | Lexar Media, Inc. | Identification and verification of a sector within a block of mass storage flash memory |
| US6801979B1 (en) | 1995-07-31 | 2004-10-05 | Lexar Media, Inc. | Method and apparatus for memory control circuit |
| US5907856A (en) * | 1995-07-31 | 1999-05-25 | Lexar Media, Inc. | Moving sectors within a block of information in a flash memory mass storage architecture |
| US5930815A (en) * | 1995-07-31 | 1999-07-27 | Lexar Media, Inc. | Moving sequential sectors within a block of information in a flash memory mass storage architecture |
| US6912618B2 (en) | 1995-07-31 | 2005-06-28 | Lexar Media, Inc. | Direct logical block addressing flash memory mass storage architecture |
| US6115785A (en) * | 1995-07-31 | 2000-09-05 | Lexar Media, Inc. | Direct logical block addressing flash memory mass storage architecture |
| US6728851B1 (en) | 1995-07-31 | 2004-04-27 | Lexar Media, Inc. | Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
| US5928370A (en) * | 1997-02-05 | 1999-07-27 | Lexar Media, Inc. | Method and apparatus for verifying erasure of memory blocks within a non-volatile memory structure |
| US6122195A (en) * | 1997-03-31 | 2000-09-19 | Lexar Media, Inc. | Method and apparatus for decreasing block write operation times performed on nonvolatile memory |
| US6587382B1 (en) | 1997-03-31 | 2003-07-01 | Lexar Media, Inc. | Nonvolatile memory using flexible erasing methods and method and system for using same |
| US6081878A (en) * | 1997-03-31 | 2000-06-27 | Lexar Media, Inc. | Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices |
| US6411546B1 (en) | 1997-03-31 | 2002-06-25 | Lexar Media, Inc. | Nonvolatile memory using flexible erasing methods and method and system for using same |
| US6327639B1 (en) | 1997-12-11 | 2001-12-04 | Lexar Media, Inc. | Method and apparatus for storing location identification information within non-volatile memory devices |
| US6076137A (en) * | 1997-12-11 | 2000-06-13 | Lexar Media, Inc. | Method and apparatus for storing location identification information within non-volatile memory devices |
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