/drivers/gpu/drm/nouveau/core/core/ |
H A D | engctx.c | 63 unsigned long save; local 69 spin_lock_irqsave(&engine->lock, save); 71 spin_unlock_irqrestore(&engine->lock, save); 96 spin_lock_irqsave(&engine->lock, save); 99 spin_unlock_irqrestore(&engine->lock, save); 108 spin_unlock_irqrestore(&engine->lock, save); 118 unsigned long save; local 121 spin_lock_irqsave(&engine->lock, save); 123 spin_unlock_irqrestore(&engine->lock, save); 235 engctx->save [all...] |
/drivers/gpu/drm/nouveau/ |
H A D | nouveau_agp.c | 107 u32 save[2]; local 135 save[0] = nvif_mask(device, NV04_PBUS_PCI_NV_1, 0x00000004, 0x00000000); 139 save[1] = nvif_mask(device, 0x000200, 0x00011100, 0x00000000); 140 nvif_mask(device, 0x000200, 0x00011100, save[1]); 143 nvif_wr32(device, NV04_PBUS_PCI_NV_1, save[0]);
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/drivers/pci/ |
H A D | vc.c | 23 * @buf: buffer to save to or restore from 24 * @dwords: number of dwords to save/restore 25 * @save: whether to save or restore 28 u32 *buf, int dwords, bool save) 33 if (save) 173 * pci_vc_do_save_buffer - Size, save, or restore VC state 176 * @save_state: buffer for save/restore 178 * @save: if provided a buffer, this indicates what to do with it 180 * Walking Virtual Channel config space to size, save, o 27 pci_vc_save_restore_dwords(struct pci_dev *dev, int pos, u32 *buf, int dwords, bool save) argument 187 pci_vc_do_save_buffer(struct pci_dev *dev, int pos, struct pci_cap_saved_state *save_state, bool save) argument [all...] |
/drivers/scsi/libsas/ |
H A D | Kconfig | 48 N here if you want to save the few kb this consumes.
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/drivers/gpu/drm/nouveau/core/include/core/ |
H A D | engctx.h | 16 unsigned long save; member in struct:nouveau_engctx
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/drivers/gpu/drm/nouveau/dispnv04/ |
H A D | disp.c | 127 crtc->funcs->save(crtc); 132 func->save(encoder); 185 * best thing to do probably is to make save/restore routines not 186 * save/restore "pre-load" state, but more general so we can save
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/drivers/media/pci/bt8xx/ |
H A D | bttv-gpio.c | 111 struct bttv_sub_device *sub, *save; local 113 list_for_each_entry_safe(sub, save, &core->subs, list) {
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/drivers/mmc/core/ |
H A D | Kconfig | 9 This is done to save power due to gating off the logic and bus
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/drivers/spi/ |
H A D | spidev.c | 391 u32 save = spi->mode; local 402 spi->mode = save; 410 u32 save = spi->mode; local 418 spi->mode = save; 427 u8 save = spi->bits_per_word; local 432 spi->bits_per_word = save; 440 u32 save = spi->max_speed_hz; local 445 spi->max_speed_hz = save;
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/drivers/char/hw_random/ |
H A D | n2-asm.S | 29 save %sp, -192, %sp
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/drivers/gpu/drm/gma500/ |
H A D | psb_device.c | 174 * psb_save_display_registers - save registers lost on suspend 201 crtc->funcs->save(crtc); 205 if (connector->funcs->save) 206 connector->funcs->save(connector);
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/drivers/gpu/drm/radeon/ |
H A D | r520.c | 136 struct rv515_mc_save save; local 139 rv515_mc_stop(rdev, &save); 165 rv515_mc_resume(rdev, &save);
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H A D | rv515.c | 296 void rv515_mc_stop(struct radeon_device *rdev, struct rv515_mc_save *save) argument 301 save->vga_render_control = RREG32(R_000300_VGA_RENDER_CONTROL); 302 save->vga_hdp_control = RREG32(R_000328_VGA_HDP_CONTROL); 310 save->crtc_enabled[i] = true; 333 save->crtc_enabled[i] = false; 336 save->crtc_enabled[i] = false; 363 if (save->crtc_enabled[i]) { 378 void rv515_mc_resume(struct radeon_device *rdev, struct rv515_mc_save *save) argument 407 if (save->crtc_enabled[i]) { 449 if (save 470 struct rv515_mc_save save; local [all...] |
H A D | r100.c | 1213 DRM_ERROR("failed to get scratch reg for rptr save (%d).\n", r); 2550 struct r100_mc_save save; local 2558 r100_mc_stop(rdev, &save); 2568 /* save PCI state */ 2600 r100_mc_resume(rdev, &save); 2862 uint32_t save, tmp; local 2864 save = RREG32(RADEON_CLOCK_CNTL_INDEX); 2865 tmp = save & ~(0x3f | RADEON_PLL_WR_EN); 2868 WREG32(RADEON_CLOCK_CNTL_INDEX, save); 3740 void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save) argument 3782 r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save) argument 3817 struct r100_mc_save save; local [all...] |
/drivers/misc/sgi-gru/ |
H A D | grumain.c | 492 static void gru_load_context_data(void *save, void *grubase, int ctxnum, argument 508 save += gru_copy_handle(cb, save); 509 save += gru_copy_handle(cbe + i * GRU_HANDLE_STRIDE, 510 save); 523 memcpy(gseg + GRU_DS_BASE, save, length); 528 static void gru_unload_context_data(void *save, void *grubase, int ctxnum, argument 548 save += gru_copy_handle(save, cb); 549 save [all...] |
/drivers/staging/lustre/lustre/llite/ |
H A D | remote_perm.c | 254 unsigned long save; local 258 save = lli->lli_rmtperm_time; 267 if (save != lli->lli_rmtperm_time) {
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/drivers/mfd/ |
H A D | sm501.c | 259 unsigned long save; local 262 spin_lock_irqsave(&sm->reg_lock, save); 274 spin_unlock_irqrestore(&sm->reg_lock, save); 293 unsigned long save; local 295 spin_lock_irqsave(&sm->reg_lock, save); 304 spin_unlock_irqrestore(&sm->reg_lock, save); 930 unsigned long save; local 936 spin_lock_irqsave(&smgpio->lock, save); 946 spin_unlock_irqrestore(&smgpio->lock, save); 955 unsigned long save; local 981 unsigned long save; local [all...] |
/drivers/pinctrl/samsung/ |
H A D | pinctrl-exynos.c | 576 struct exynos_eint_gpio_save *save = bank->soc_priv; local 579 save->eint_con = readl(regs + EXYNOS_GPIO_ECON_OFFSET 581 save->eint_fltcon0 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET 583 save->eint_fltcon1 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET 586 pr_debug("%s: save con %#010x\n", bank->name, save->eint_con); 587 pr_debug("%s: save fltcon0 %#010x\n", bank->name, save->eint_fltcon0); 588 pr_debug("%s: save fltcon1 %#010x\n", bank->name, save 606 struct exynos_eint_gpio_save *save = bank->soc_priv; local [all...] |
/drivers/video/fbdev/aty/ |
H A D | radeon_base.c | 1202 struct radeon_regs *save) 1205 save->crtc_gen_cntl = INREG(CRTC_GEN_CNTL); 1206 save->crtc_ext_cntl = INREG(CRTC_EXT_CNTL); 1207 save->crtc_more_cntl = INREG(CRTC_MORE_CNTL); 1208 save->dac_cntl = INREG(DAC_CNTL); 1209 save->crtc_h_total_disp = INREG(CRTC_H_TOTAL_DISP); 1210 save->crtc_h_sync_strt_wid = INREG(CRTC_H_SYNC_STRT_WID); 1211 save->crtc_v_total_disp = INREG(CRTC_V_TOTAL_DISP); 1212 save->crtc_v_sync_strt_wid = INREG(CRTC_V_SYNC_STRT_WID); 1213 save 1201 radeon_save_state(struct radeonfb_info *rinfo, struct radeon_regs *save) argument [all...] |
H A D | radeonfb.h | 170 /* Other registers to save for VT switches or driver load/unload */ 444 u32 save, tmp; local 445 save = INREG(CLOCK_CNTL_INDEX); 446 tmp = save & ~(0x3f | PLL_WR_EN); 449 OUTREG(CLOCK_CNTL_INDEX, save);
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/drivers/gpu/drm/armada/ |
H A D | armada_slave.c | 57 .save = drm_i2c_encoder_save,
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/drivers/gpu/drm/ |
H A D | drm_encoder_slave.c | 176 get_slave_funcs(encoder)->save(encoder);
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/drivers/video/fbdev/vermilion/ |
H A D | cr_pll.c | 146 .save = crvml_sys_save,
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/drivers/gpu/drm/tilcdc/ |
H A D | tilcdc_drv.c | 427 uint8_t save; member in struct:__anon1047 430 #define REG(rev, save, reg) { #reg, rev, save, reg } 585 if (registers[i].save && (priv->rev >= registers[i].rev)) 599 if (registers[i].save && (priv->rev >= registers[i].rev))
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/drivers/gpu/drm/vmwgfx/ |
H A D | vmwgfx_kms.c | 1561 struct vmw_vga_topology_state *save; local 1584 save = &vmw_priv->vga_save[i]; 1586 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY); 1587 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X); 1588 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y); 1589 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH); 1590 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT); 1593 save->width == 0 && save->height == 0) { 1600 save 1610 struct vmw_vga_topology_state *save; local [all...] |