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Searched defs:pins (Results 51 - 69 of 69) sorted by relevance

123

/drivers/pinctrl/
H A Dpinctrl-tz1090-pdc.c2 * Pinctrl driver for the Toumaz Xenif TZ1090 PowerDown Controller pins
82 * @pins: Array of pin numbers in this pin group.
83 * @npins: Number of pins in this pin group.
90 * A representation of a group of pins (possibly just one pin) in the TZ1090
96 const unsigned int *pins; member in struct:tz1090_pdc_pingroup
105 * All PDC pins can be GPIOs. Define these first to match how the GPIO driver
106 * names/numbers its pins.
132 /* Pin group pins */
187 * @pg_name: Pin group name (stringified, _pins appended to get pins array)
195 .pins
268 tz1090_pdc_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, const unsigned int **pins, unsigned int *num_pins) argument
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H A Dpinctrl-at91.c72 * from the corresponding device datasheet. This value is different for pins
120 * array is the same as pins.
121 * @pins: an array of discrete physical pins used in this group, taken
123 * @npins: the number of pins in this group array, i.e. the number of
124 * elements in .pins so we can iterate over that array
129 unsigned int *pins; member in struct:at91_pin_group
208 dev_dbg(info->dev, "%s: %d 0:%d\n", name, grp->npins, grp->pins[0]);
231 const unsigned **pins,
239 *pins
230 at91_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *npins) argument
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H A Dpinctrl-bcm2835.c114 /* pins are just named GPIO0..GPIO53 */
619 const unsigned **pins,
622 *pins = &bcm2835_gpio_pins[selector].number;
707 struct property *pins, *funcs, *pulls; local
713 pins = of_find_property(np, "brcm,pins", NULL);
714 if (!pins) {
715 dev_err(pc->dev, "%s: missing brcm,pins property\n",
730 num_pins = pins->length / 4;
759 err = of_property_read_u32_index(np, "brcm,pins",
617 bcm2835_pctl_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *num_pins) argument
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H A Dpinctrl-rockchip.c93 * @nr_pins: number of pins in this bank
125 #define PIN_BANK(id, pins, label) \
128 .nr_pins = pins, \
138 #define PIN_BANK_IOMUX_FLAGS(id, pins, label, iom0, iom1, iom2, iom3) \
141 .nr_pins = pins, \
173 * struct rockchip_pin_group: represent group of pins of a pinmux function.
175 * @pins: the pins included in this group.
176 * @npins: number of pins included in this group.
184 unsigned int *pins; member in struct:rockchip_pin_group
289 rockchip_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *npins) argument
823 const unsigned int *pins = info->groups[group].pins; local
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H A Dpinctrl-single.c37 #define PCS_MUX_PINS_NAME "pinctrl-single,pins"
46 * @gpins: array of the pins in the group
47 * @ngpins: number of pins in the group
118 * @offset: offset base of pins
119 * @npins: number pins with the same mux value of gpio function
136 * support for registering pins individually in the pinctrl
190 * @names: array of register names for pins
191 * @pins: physical pins on the SoC
227 struct pcs_data pins; member in struct:pcs_device
322 pcs_get_group_pins(struct pinctrl_dev *pctldev, unsigned gselector, const unsigned **pins, unsigned *npins) argument
685 const unsigned *pins; local
707 const unsigned *pins; local
1144 int size, rows, *pins, index = 0, found = 0, res = -ENOMEM; local
1232 int size, rows, *pins, index = 0, found = 0, res = -ENOMEM; local
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H A Dpinctrl-u300.c10 * pins, so we enumerate the pads we can mux rather than actual pins. The pads
11 * are connected to different pins in different packaging types, so it would
684 * @pins: an array of discrete physical pins used in this group, taken
686 * @num_pins: the number of pins in this group array, i.e. the number of
687 * elements in .pins so we can iterate over that array
691 const unsigned int *pins; member in struct:u300_pin_group
714 /* The chip power pins are VDD, GND, VDDIO and VSSIO */
807 .pins
848 u300_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *num_pins) argument
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H A Dpinctrl-st.c63 * Each field in this register is 8 bit corresponding to 8 pins in the bank.
265 unsigned int *pins; member in struct:st_pctl_group
697 * PIO port pins. Each pin can be configured as an input, output,
792 unsigned selector, const unsigned **pins, unsigned *npins)
799 *pins = info->groups[selector].pins;
858 pin_get_name(pctldev, grp->pins[i]);
1156 /* retime avaiable for all pins by default */
1175 struct device_node *pins; local
1178 pins
791 st_pctl_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *npins) argument
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H A Dpinctrl-tz1090.c97 * @pins: Array of pin numbers in this pin group.
98 * @npins: Number of pins in this pin group.
105 * @func_count: Number of pins using current mux function.
107 * A representation of a group of pins (possibly just one pin) in the TZ1090
113 const unsigned int *pins; member in struct:tz1090_pingroup
125 * Most pins affected by the pinmux can also be GPIOs. Define these first.
126 * These must match how the GPIO driver names/numbers its pins.
130 /* GPIO pins */
222 /* Non-GPIO pins */
237 /* GPIO pins */
1004 tz1090_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group, const unsigned int **pins, unsigned int *num_pins) argument
1425 const unsigned int *pins; local
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H A Dpinctrl-bcm281xx.c91 /* List of all pins */
92 const struct pinctrl_pin_desc *pins; member in struct:bcm281xx_pinctrl_data
943 .pins = bcm281xx_pinctrl_pins,
957 return *(enum bcm281xx_pin_type *)(pdata->pins[pin].drv_data);
998 return pdata->pins[group].name;
1003 const unsigned **pins,
1008 *pins = &pdata->pins[group].number;
1064 u32 offset = 4 * pdata->pins[group].number;
1069 __func__, f->name, function, pdata->pins[grou
1001 bcm281xx_pinctrl_get_group_pins(struct pinctrl_dev *pctldev, unsigned group, const unsigned **pins, unsigned *num_pins) argument
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/drivers/pinctrl/samsung/
H A Dpinctrl-exynos5440.c79 * struct exynos5440_pin_group: represent group of pins for pincfg setting.
81 * @pins: the pins included in this group.
82 * @num_pins: number of pins included in this group.
86 const unsigned int *pins; member in struct:exynos5440_pin_group
166 unsigned selector, const unsigned **pins, unsigned *num_pins)
171 *pins = priv->pin_groups[selector].pins;
517 const unsigned int *pins; local
521 pins
165 exynos5440_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *num_pins) argument
535 const unsigned int *pins; local
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H A Dpinctrl-samsung.c80 const unsigned **pins,
85 *pins = pmx->pin_groups[group].pins;
232 ret = of_property_count_strings(np, "samsung,pins");
234 dev_err(dev, "could not parse property samsung,pins\n");
243 of_property_for_each_string(np, "samsung,pins", prop, group) {
381 pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->ctrl->base,
494 const unsigned int *pins; local
498 pins = drvdata->pin_groups[group].pins;
78 samsung_get_group_pins(struct pinctrl_dev *pctldev, unsigned group, const unsigned **pins, unsigned *num_pins) argument
511 const unsigned int *pins; local
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/drivers/pinctrl/sirf/
H A Dpinctrl-sirf.c63 const unsigned **pins,
66 *pins = sirfsoc_pin_groups[selector].pins;
93 ret = of_property_count_strings(np, "sirf,pins");
111 of_property_for_each_string(np, "sirf,pins", prop, group) {
328 sirfsoc_pinmux_desc.pins = pdata->pads;
332 /* Now register the pin controller and all pins it handles */
61 sirfsoc_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *num_pins) argument
/drivers/gpu/drm/radeon/
H A Dr600_dpm.c527 enum r600_power_level index, u64 pins)
532 WREG32(CTXSW_VID_LOWER_GPIO_CNTL + (ix * 4), pins & 0xffffffff);
536 tmp = (tmp & ~mask) | ((pins >> (32 - (3 * ix))) & mask);
526 r600_voltage_control_program_voltages(struct radeon_device *rdev, enum r600_power_level index, u64 pins) argument
/drivers/usb/host/
H A Dfhci.h248 struct qe_pin *pins[NUM_PINS]; member in struct:fhci_hcd
/drivers/pinctrl/nomadik/
H A Dpinctrl-nomadik.c39 * AMBA device, managing 32 pins and alternate functions. The logic block
1314 const unsigned **pins,
1319 *pins = npct->soc->groups[selector].pins;
1486 if (npct->soc->pins[i].number == pin_number)
1487 return npct->soc->pins[i].name;
1528 ret = of_property_count_strings(np, "ste,pins");
1538 of_property_for_each_string(np, "ste,pins", prop, group) {
1551 ret = of_property_count_strings(np, "ste,pins");
1560 of_property_for_each_string(np, "ste,pins", pro
1313 nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector, const unsigned **pins, unsigned *num_pins) argument
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/drivers/video/fbdev/matrox/
H A Dmatroxfb_base.h340 unsigned char pins[128]; member in struct:matrox_bios
/drivers/infiniband/hw/qib/
H A Dqib_iba7322.c3003 u64 pins; local
3006 pins = qib_read_kreg64(dd, kr_extstatus);
3007 pins >>= SYM_LSB(EXTStatus, GPIOIn);
3008 if (!(pins & mask)) {
/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_main.c2146 int bnx2x_set_mult_gpio(struct bnx2x *bp, u8 pins, u32 mode) argument
2156 gpio_reg &= ~(pins << MISC_REGISTERS_GPIO_FLOAT_POS);
2157 gpio_reg &= ~(pins << MISC_REGISTERS_GPIO_CLR_POS);
2158 gpio_reg &= ~(pins << MISC_REGISTERS_GPIO_SET_POS);
2162 DP(NETIF_MSG_LINK, "Set GPIO 0x%x -> output low\n", pins);
2164 gpio_reg |= (pins << MISC_REGISTERS_GPIO_CLR_POS);
2168 DP(NETIF_MSG_LINK, "Set GPIO 0x%x -> output high\n", pins);
2170 gpio_reg |= (pins << MISC_REGISTERS_GPIO_SET_POS);
2174 DP(NETIF_MSG_LINK, "Set GPIO 0x%x -> input\n", pins);
2176 gpio_reg |= (pins << MISC_REGISTERS_GPIO_FLOAT_PO
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/drivers/video/fbdev/omap2/dss/
H A Ddsi.c4027 const int *pins; local
4041 pins = pin_cfg->pins;
4056 dx = pins[i];
4057 dy = pins[i + 1];
5439 pin_cfg.pins[i] = (int)lane_arr[i];
5443 dev_err(&pdev->dev, "failed to configure pins");

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