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Searched refs:hz (Results 1 - 25 of 32) sorted by relevance

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/drivers/clocksource/
H A Dmmio.c47 * @hz: Frequency of the clocksource in Hz
53 unsigned long hz, int rating, unsigned bits,
72 return clocksource_register_hz(&cs->clksrc, hz);
52 clocksource_mmio_init(void __iomem *base, const char *name, unsigned long hz, int rating, unsigned bits, cycle_t (*read)(struct clocksource *)) argument
/drivers/spi/
H A Dspi-bitbang.c145 u32 hz; local
149 hz = t->speed_hz;
152 hz = 0;
168 if (!hz)
169 hz = spi->max_speed_hz;
170 if (hz) {
171 cs->nsecs = (1000000000/2) / hz;
H A Dspi-s3c24xx.c36 * @hz: Last frequency calculated for @sppre field.
42 unsigned int hz; member in struct:s3c24xx_spi_devstate
124 unsigned int hz; local
128 hz = t ? t->speed_hz : spi->max_speed_hz;
130 if (!hz)
131 hz = spi->max_speed_hz;
146 if (cs->hz != hz) {
148 div = DIV_ROUND_UP(clk, hz * 2) - 1;
154 div, hz, cl
[all...]
H A Dspi-omap-uwire.c319 unsigned hz; local
352 hz = spi->max_speed_hz;
354 hz = t->speed_hz;
356 if (!hz) {
379 div2 = (rate / div1 + hz - 1) / hz;
385 dev_name(&spi->dev), rate / 10 / 8, hz);
H A Dspi-sc18is602.c139 static int sc18is602_setup_transfer(struct sc18is602 *hw, u32 hz, u8 mode) argument
152 if (hz >= hw->freq / 4) {
155 } else if (hz >= hw->freq / 16) {
158 } else if (hz >= hw->freq / 64) {
H A Dspi-mxs.c77 const unsigned int hz = min(dev->max_speed_hz, t->speed_hz); local
79 if (hz == 0) {
84 if (hz != spi->sck) {
85 mxs_ssp_set_clk_rate(ssp, hz);
87 * Save requested rate, hz, rather than the actual rate,
91 spi->sck = hz;
H A Dspi-fsl-espi.c137 u32 hz = 0; local
142 hz = t->speed_hz;
149 if (!hz)
150 hz = spi->max_speed_hz;
176 if ((mpc8xxx_spi->spibrg / hz) > 64) {
178 pm = DIV_ROUND_UP(mpc8xxx_spi->spibrg, hz * 16 * 4);
182 hz, mpc8xxx_spi->spibrg / (4 * 16 * (32 + 1)));
186 pm = DIV_ROUND_UP(mpc8xxx_spi->spibrg, hz * 4);
H A Dspi-fsl-spi.c228 u32 hz = 0; local
235 hz = t->speed_hz;
242 if (!hz)
243 hz = spi->max_speed_hz;
267 if ((mpc8xxx_spi->spibrg / hz) > 64) {
269 pm = (mpc8xxx_spi->spibrg - 1) / (hz * 64) + 1;
273 hz, mpc8xxx_spi->spibrg / 1024);
277 pm = (mpc8xxx_spi->spibrg - 1) / (hz * 4) + 1;
H A Dspi-bcm63xx-hsspi.c125 struct spi_device *spi, int hz)
130 reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz));
135 if (hz > HSSPI_MAX_SYNC_CLOCK)
124 bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs, struct spi_device *spi, int hz) argument
H A Dspi-au1550.c237 unsigned bpw, hz; local
241 hz = spi->max_speed_hz;
246 hz = t->speed_hz;
249 if (!hz)
268 cfg |= au1550_spi_baudcfg(hw, hz);
H A Dspi-davinci.c294 u32 hz = 0, spifmt = 0; local
304 hz = t->speed_hz;
325 if (!hz)
326 hz = spi->max_speed_hz;
330 prescale = davinci_spi_get_prescale(dspi, hz);
H A Dspi-oc-tiny.c65 static unsigned int tiny_spi_baud(struct spi_device *spi, unsigned int hz) argument
69 return min(DIV_ROUND_UP(hw->freq, hz * 2), (1U << hw->baudwidth)) - 1;
H A Dspi-sirf.c524 int hz = 0; local
532 hz = t && t->speed_hz ? t->speed_hz : spi->max_speed_hz;
534 regval = (sspi->ctrl_freq / (2 * hz)) - 1;
536 dev_err(&spi->dev, "Speed %d not supported\n", hz);
/drivers/pwm/
H A Dpwm-tegra.c71 unsigned long rate, hz; local
90 hz = 1000000000ul / period_ns;
92 rate = (rate + (hz / 2)) / hz;
/drivers/ssb/
H A Ddriver_mipscore.c284 unsigned long hz, ns; local
293 hz = ssb_clockspeed(bus);
294 if (!hz)
295 hz = 100000000;
296 ns = 1000000000 / hz;
/drivers/iio/common/st_sensors/
H A Dst_sensors_core.c53 if (sensor->odr.odr_avl[i].hz == 0)
56 if (sensor->odr.odr_avl[i].hz == odr) {
57 odr_out->hz = sensor->odr.odr_avl[i].hz;
94 sdata->odr = odr_out.hz;
175 sdata->odr = odr_out.hz;
511 if (sdata->sensor->odr.odr_avl[i].hz == 0)
515 sdata->sensor->odr.odr_avl[i].hz);
/drivers/mmc/core/
H A Dcore.h38 void mmc_set_clock(struct mmc_host *host, unsigned int hz);
H A Dcore.c1004 * is below "hz".
1006 static void __mmc_set_clock(struct mmc_host *host, unsigned int hz) argument
1008 WARN_ON(hz && hz < host->f_min);
1010 if (hz > host->f_max)
1011 hz = host->f_max;
1013 host->ios.clock = hz;
1017 void mmc_set_clock(struct mmc_host *host, unsigned int hz) argument
1020 __mmc_set_clock(host, hz);
/drivers/gpu/drm/via/
H A Dvia_verifier.c114 hazard_t hz; member in struct:__anon1053
347 investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t *cur_seq) argument
351 if (cur_seq->unfinished && (cur_seq->unfinished != seqs[hz])) {
357 switch (hz) {
629 hazard_t hz; local
696 if ((hz = hz_table[cmd >> 24])) {
697 if ((hz_mode = investigate_hazard(cmd, hz, hc_state))) {
1100 table[init_table[i].code] = init_table[i].hz;
/drivers/gpu/host1x/
H A Dintr.c307 u32 hz = clk_get_rate(host->clk); local
311 err = host1x_hw_intr_init_host_sync(host, DIV_ROUND_UP(hz, 1000000),
/drivers/tty/vt/
H A Dkeyboard.c228 unsigned int *hz = data; local
233 input_inject_event(handle, EV_SND, SND_TONE, *hz);
234 if (*hz)
238 input_inject_event(handle, EV_SND, SND_BELL, *hz ? 1 : 0);
253 void kd_mksound(unsigned int hz, unsigned int ticks) argument
257 input_handler_for_each_handle(&kbd_handler, &hz, kd_sound_helper);
259 if (hz && ticks)
/drivers/mmc/host/
H A Dcb710-mmc.c28 static void cb710_mmc_select_clock_divider(struct mmc_host *mmc, int hz) argument
46 if (hz >= src_hz >> cb710_clock_divider_log2[divider_idx])
60 hz, src_freq_idx, divider_idx & 7, divider_idx & 8); local
/drivers/video/fbdev/core/
H A Dfbmon.c707 int num_modes, hz, hscan, pixclock; local
733 hz = (hscan + vtotal / 2) / vtotal;
747 if (specs->vfmax == 0 || specs->vfmax < hz)
748 specs->vfmax = hz;
750 if (specs->vfmin == 0 || specs->vfmin > hz)
751 specs->vfmin = hz;
/drivers/input/keyboard/
H A Dlm8323.c456 int div512, perstep, steps, hz, up, kill; local
481 hz = 32768 / 512;
484 hz = 32768 / 16;
487 perstep = (hz * pwm->fade_time) / (steps * 1000);
/drivers/iio/imu/inv_mpu6050/
H A Dinv_mpu_core.c418 const int hz[] = {188, 98, 42, 20, 10, 5}; local
427 while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))

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